summaryrefslogtreecommitdiff
path: root/arch/arm64/boot
diff options
context:
space:
mode:
authorMadalin Bucur <madalin.bucur@nxp.com>2017-06-07 08:56:51 (GMT)
committerXie Xiaobo <xiaobo.xie@nxp.com>2017-07-14 09:57:29 (GMT)
commit08f5354734aaee492b5b47697172f8875d250c92 (patch)
tree696ac75ae176fb2812ce7fe1f0b4007446409357 /arch/arm64/boot
parent2900a5ff561ca97b8a1b6014d9245f9d2e2a1eb7 (diff)
downloadlinux-08f5354734aaee492b5b47697172f8875d250c92.tar.xz
arm64: dts: add DPAA 1.x SDK qds dts files
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile2
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts68
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts160
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts75
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts148
5 files changed, 453 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index f224232..4e3f0af 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -2,9 +2,11 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
new file mode 100644
index 0000000..310ce81
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
@@ -0,0 +1,68 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright 2014-2015 Freescale Semiconductor, Inc.
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "fsl-ls1043a-qds.dts"
+
+&bman_fbpr {
+ compatible = "fsl,bman-fbpr";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+&qman_fqd {
+ compatible = "fsl,qman-fqd";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+&qman_pfdr {
+ compatible = "fsl,qman-pfdr";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+
+&soc {
+#include "qoriq-dpaa-eth.dtsi"
+};
+
+&fman0 {
+ compatible = "fsl,fman", "simple-bus";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
index 6341281..c20ad7c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -60,6 +60,22 @@
serial1 = &duart1;
serial2 = &duart2;
serial3 = &duart3;
+ sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
+ sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
+ sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
+ sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
+ qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
+ qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
+ qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
+ qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
+ qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
+ qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
+ qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
+ qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
+ emi1_slot1 = &ls1043mdio_s1;
+ emi1_slot2 = &ls1043mdio_s2;
+ emi1_slot3 = &ls1043mdio_s3;
+ emi1_slot4 = &ls1043mdio_s4;
};
chosen {
@@ -183,3 +199,147 @@
};
#include "fsl-ls1043-post.dtsi"
+
+&fman0 {
+ ethernet@e0000 {
+ phy-handle = <&qsgmii_phy_s2_p1>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e2000 {
+ phy-handle = <&qsgmii_phy_s2_p2>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e4000 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii";
+ };
+
+ ethernet@e6000 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii";
+ };
+
+ ethernet@e8000 {
+ phy-handle = <&qsgmii_phy_s2_p3>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@ea000 {
+ phy-handle = <&qsgmii_phy_s2_p4>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@f0000 { /* DTSEC9/10GEC1 */
+ fixed-link = <1 1 10000 0 0>;
+ phy-connection-type = "xgmii";
+ };
+};
+
+&fpga {
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x54 1>; /* BRDCFG4 */
+ mux-mask = <0xe0>; /* EMI1 */
+
+ /* On-board RGMII1 PHY */
+ ls1043mdio0: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 { /* MAC3 */
+ reg = <0x1>;
+ };
+ };
+
+ /* On-board RGMII2 PHY */
+ ls1043mdio1: mdio@1 {
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 { /* MAC4 */
+ reg = <0x2>;
+ };
+ };
+
+ /* Slot 1 */
+ ls1043mdio_s1: mdio@2 {
+ reg = <0x40>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ qsgmii_phy_s1_p1: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ qsgmii_phy_s1_p2: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ qsgmii_phy_s1_p3: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+ qsgmii_phy_s1_p4: ethernet-phy@7 {
+ reg = <0x7>;
+ };
+
+ sgmii_phy_s1_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ };
+
+ /* Slot 2 */
+ ls1043mdio_s2: mdio@3 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ qsgmii_phy_s2_p1: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ qsgmii_phy_s2_p2: ethernet-phy@9 {
+ reg = <0x9>;
+ };
+ qsgmii_phy_s2_p3: ethernet-phy@a {
+ reg = <0xa>;
+ };
+ qsgmii_phy_s2_p4: ethernet-phy@b {
+ reg = <0xb>;
+ };
+
+ sgmii_phy_s2_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ };
+
+ /* Slot 3 */
+ ls1043mdio_s3: mdio@4 {
+ reg = <0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sgmii_phy_s3_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ };
+
+ /* Slot 4 */
+ ls1043mdio_s4: mdio@5 {
+ reg = <0xa0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sgmii_phy_s4_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
new file mode 100644
index 0000000..1046a9a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
@@ -0,0 +1,75 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ *
+ * Copyright 2014-2015 Freescale Semiconductor, Inc.
+ *
+ * Mingkai Hu <Mingkai.hu@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "fsl-ls1046a-rdb.dts"
+
+&bman_fbpr {
+ compatible = "fsl,bman-fbpr";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+&qman_fqd {
+ compatible = "fsl,qman-fqd";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+&qman_pfdr {
+ compatible = "fsl,qman-pfdr";
+ alloc-ranges = <0 0 0x10000 0>;
+};
+
+&soc {
+#include "qoriq-dpaa-eth.dtsi"
+};
+
+&fsldpaa {
+ ethernet@9 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
+ };
+};
+
+&fman0 {
+ compatible = "fsl,fman", "simple-bus";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
index 434383b..9f775cd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
@@ -61,6 +61,20 @@
serial1 = &duart1;
serial2 = &duart2;
serial3 = &duart3;
+
+ emi1_slot1 = &ls1046mdio_s1;
+ emi1_slot2 = &ls1046mdio_s2;
+ emi1_slot4 = &ls1046mdio_s4;
+
+ sgmii_s1_p1 = &sgmii_phy_s1_p1;
+ sgmii_s1_p2 = &sgmii_phy_s1_p2;
+ sgmii_s1_p3 = &sgmii_phy_s1_p3;
+ sgmii_s1_p4 = &sgmii_phy_s1_p4;
+ sgmii_s4_p1 = &sgmii_phy_s4_p1;
+ qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
+ qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
+ qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
+ qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
};
chosen {
@@ -212,3 +226,137 @@
};
#include "fsl-ls1046-post.dtsi"
+
+&fman0 {
+ ethernet@e0000 {
+ phy-handle = <&qsgmii_phy_s2_p1>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e2000 {
+ phy-handle = <&sgmii_phy_s4_p1>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e4000 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii";
+ };
+
+ ethernet@e6000 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii";
+ };
+
+ ethernet@e8000 {
+ phy-handle = <&sgmii_phy_s1_p3>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@ea000 {
+ phy-handle = <&sgmii_phy_s1_p4>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@f0000 { /* DTSEC9/10GEC1 */
+ phy-handle = <&sgmii_phy_s1_p1>;
+ phy-connection-type = "xgmii";
+ };
+
+ ethernet@f2000 { /* DTSEC10/10GEC2 */
+ phy-handle = <&sgmii_phy_s1_p2>;
+ phy-connection-type = "xgmii";
+ };
+};
+
+&fpga {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x54 1>; /* BRDCFG4 */
+ mux-mask = <0xe0>; /* EMI1 */
+
+ /* On-board RGMII1 PHY */
+ ls1046mdio0: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 { /* MAC3 */
+ reg = <0x1>;
+ };
+ };
+
+ /* On-board RGMII2 PHY */
+ ls1046mdio1: mdio@1 {
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 { /* MAC4 */
+ reg = <0x2>;
+ };
+ };
+
+ /* Slot 1 */
+ ls1046mdio_s1: mdio@2 {
+ reg = <0x40>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sgmii_phy_s1_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+
+ sgmii_phy_s1_p2: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+
+ sgmii_phy_s1_p3: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+
+ sgmii_phy_s1_p4: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ /* Slot 2 */
+ ls1046mdio_s2: mdio@3 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ qsgmii_phy_s2_p1: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ qsgmii_phy_s2_p2: ethernet-phy@9 {
+ reg = <0x9>;
+ };
+ qsgmii_phy_s2_p3: ethernet-phy@a {
+ reg = <0xa>;
+ };
+ qsgmii_phy_s2_p4: ethernet-phy@b {
+ reg = <0xb>;
+ };
+ };
+
+ /* Slot 4 */
+ ls1046mdio_s4: mdio@5 {
+ reg = <0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sgmii_phy_s4_p1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ };
+ };
+};