diff options
| author | Robert Richter <rrichter@cavium.com> | 2015-09-21 20:58:35 (GMT) |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2015-09-29 08:10:53 (GMT) |
| commit | 6d4e11c5e2e8cd54a035ba395bf8ccfa7e22cfd8 (patch) | |
| tree | 4a75f95e66d6a3a370ca9027373d5c1cbe856f2e /arch/arm64/include/asm/cpufeature.h | |
| parent | 30f2136346cab91e1ffd9ee6370d76809f20487a (diff) | |
| download | linux-6d4e11c5e2e8cd54a035ba395bf8ccfa7e22cfd8.tar.xz | |
irqchip/gicv3: Workaround for Cavium ThunderX erratum 23154
This patch implements Cavium ThunderX erratum 23154.
The gicv3 of ThunderX requires a modified version for reading the IAR
status to ensure data synchronization. Since this is in the fast-path
and called with each interrupt, runtime patching is used using jump
label patching for smallest overhead (no-op). This is the same
technique as used for tracepoints.
Signed-off-by: Robert Richter <rrichter@cavium.com>
Reviewed-by: Marc Zygnier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Link: http://lkml.kernel.org/r/1442869119-1814-3-git-send-email-rric@kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm64/include/asm/cpufeature.h')
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 1715707..dbc78d2 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -27,8 +27,9 @@ #define ARM64_HAS_SYSREG_GIC_CPUIF 3 #define ARM64_HAS_PAN 4 #define ARM64_HAS_LSE_ATOMICS 5 +#define ARM64_WORKAROUND_CAVIUM_23154 6 -#define ARM64_NCAPS 6 +#define ARM64_NCAPS 7 #ifndef __ASSEMBLY__ |