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| author | Jisheng Zhang <jszhang@marvell.com> | 2016-07-07 06:01:15 (GMT) |
|---|---|---|
| committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2016-09-28 18:37:06 (GMT) |
| commit | 139787f426f735c96ddea2acd166b8127799ae9f (patch) | |
| tree | beea4aa3b9d43476a9548d276ba312d4d099a0c1 /arch/arm64/kernel/hw_breakpoint.c | |
| parent | 7091eb9699151009d2980ae28ffdc8cbc9b5207e (diff) | |
| download | linux-139787f426f735c96ddea2acd166b8127799ae9f.tar.xz | |
arm64: dts: berlin4ct: Add L2 cache topology
This patch adds the L2 cache topology for berlin4ct which has 1MB L2
cache.
[Sebastian: rename cache node from "l2-cache" to "cache"]
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm64/kernel/hw_breakpoint.c')
0 files changed, 0 insertions, 0 deletions