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authorWill Deacon <will.deacon@arm.com>2015-01-26 18:46:19 (GMT)
committerWill Deacon <will.deacon@arm.com>2015-07-27 13:34:39 (GMT)
commit40a1db2434a1b62332b1af25cfa14d7b8c0301fe (patch)
treeb98eadfd8f2e2e98b162a7b0a52635ed9c6d7ee4 /arch/arm64/kernel
parentc275f76bb4ce16fd0205da1e15f31b875013678e (diff)
downloadlinux-40a1db2434a1b62332b1af25cfa14d7b8c0301fe.tar.xz
arm64: elf: advertise 8.1 atomic instructions as new hwcap
The ARM v8.1 architecture introduces new atomic instructions to the A64 instruction set for things like cmpxchg, so advertise their availability to userspace using a hwcap. Reviewed-by: Steve Capper <steve.capper@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r--arch/arm64/kernel/setup.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index e7a1e71..b2f9895 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -278,6 +278,19 @@ static void __init setup_processor(void)
if (block && !(block & 0x8))
elf_hwcap |= HWCAP_CRC32;
+ block = (features >> 20) & 0xf;
+ if (!(block & 0x8)) {
+ switch (block) {
+ default:
+ case 2:
+ elf_hwcap |= HWCAP_ATOMICS;
+ case 1:
+ /* RESERVED */
+ case 0:
+ break;
+ }
+ }
+
#ifdef CONFIG_COMPAT
/*
* ID_ISAR5_EL1 carries similar information as above, but pertaining to
@@ -457,6 +470,7 @@ static const char *hwcap_str[] = {
"sha1",
"sha2",
"crc32",
+ "atomics",
NULL
};