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| author | Alex Shi <alex.shi@linaro.org> | 2017-06-15 10:06:27 (GMT) |
|---|---|---|
| committer | Alex Shi <alex.shi@linaro.org> | 2017-06-15 10:34:39 (GMT) |
| commit | 841d681618d81ee303ef0603eb6940b02f0981f2 (patch) | |
| tree | 1904d583b6a58e576d18df1a9e412c333b309f10 /arch/arm64/kernel | |
| parent | 4612ed6853c073deb31340a88a44115ae351d8b6 (diff) | |
| parent | 05afd4c0af6a43f6bda7caaacb01bc0116d50d3b (diff) | |
| download | linux-841d681618d81ee303ef0603eb6940b02f0981f2.tar.xz | |
Merge remote-tracking branch 'lts/linux-4.9.y' into linux-linaro-lsk-v4.9
Conflicts:
arch/arm64/kernel/entry.S
compatiable with PAN in arch/arm64/kernel/traps.c
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/entry.S | 8 | ||||
| -rw-r--r-- | arch/arm64/kernel/hw_breakpoint.c | 3 | ||||
| -rw-r--r-- | arch/arm64/kernel/traps.c | 4 |
3 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 085d9f3..bab8334 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -30,8 +30,9 @@ #include <asm/irq.h> #include <asm/memory.h> #include <asm/ptrace.h> -#include <asm/thread_info.h> #include <asm/uaccess.h> +#include <asm/thread_info.h> +#include <asm/asm-uaccess.h> #include <asm/unistd.h> /* @@ -428,12 +429,13 @@ el1_da: /* * Data abort handling */ - mrs x0, far_el1 + mrs x3, far_el1 enable_dbg // re-enable interrupts if they were enabled in the aborted context tbnz x23, #7, 1f // PSR_I_BIT enable_irq 1: + clear_address_tag x0, x3 mov x2, sp // struct pt_regs bl do_mem_abort @@ -594,7 +596,7 @@ el0_da: // enable interrupts before calling the main handler enable_dbg_and_irq ct_user_exit - bic x0, x26, #(0xff << 56) + clear_address_tag x0, x26 mov x1, x25 mov x2, sp bl do_mem_abort diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 948b731..0b9e5f6 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -36,6 +36,7 @@ #include <asm/traps.h> #include <asm/cputype.h> #include <asm/system_misc.h> +#include <asm/uaccess.h> /* Breakpoint currently in use for each BRP. */ static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]); @@ -696,7 +697,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, /* Check if the watchpoint value matches. */ val = read_wb_reg(AARCH64_DBG_REG_WVR, i); - if (val != (addr & ~alignment_mask)) + if (val != (untagged_addr(addr) & ~alignment_mask)) goto unlock; /* Possible match, check the byte address select to confirm. */ diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 659b2e6..7501b40 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -440,7 +440,7 @@ int cpu_enable_cache_maint_trap(void *__unused) } #define __user_cache_maint(insn, address, res) \ - if (untagged_addr(address) >= user_addr_max()) { \ + if (address >= user_addr_max()) { \ res = -EFAULT; \ } else { \ uaccess_ttbr0_enable(); \ @@ -466,7 +466,7 @@ static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT; int ret = 0; - address = (rt == 31) ? 0 : regs->regs[rt]; + address = (rt == 31) ? 0 : untagged_addr(regs->regs[rt]); switch (crm) { case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ |