diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2012-07-04 12:27:34 (GMT) |
|---|---|---|
| committer | Benoit Cousson <b-cousson@ti.com> | 2012-09-07 17:18:41 (GMT) |
| commit | 926fd45ba9eeb4c3d0454b934161ee884dd82a22 (patch) | |
| tree | cc72dae1f1078300d513e4f6dd76d094c8ba22d9 /arch/arm | |
| parent | 11c27069cf963f7445a7b515bcb703d90ae0c162 (diff) | |
| download | linux-926fd45ba9eeb4c3d0454b934161ee884dd82a22.tar.xz | |
ARM: OMAP4: Add L2 Cache Controller in Device Tree
Provide PL310 Level 2 Cache Controller Device Tree
support for OMAP4 based devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 6 |
2 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index c7dc11f..cb18d2a 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -30,12 +30,21 @@ cpus { cpu@0 { compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; }; }; + L2: l2-cache-controller@48242000 { + compatible = "arm,pl310-cache"; + reg = <0x48242000 0x1000>; + cache-unified; + cache-level = <2>; + }; + /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index c29dee9..6f95992 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -16,6 +16,7 @@ #include <linux/io.h> #include <linux/platform_device.h> #include <linux/memblock.h> +#include <linux/of.h> #include <asm/hardware/gic.h> #include <asm/hardware/cache-l2x0.h> @@ -171,7 +172,10 @@ static int __init omap_l2_cache_init(void) /* Enable PL310 L2 Cache controller */ omap_smc1(0x102, 0x1); - l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK); + if (of_have_populated_dt()) + l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK); + else + l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK); /* * Override default outer_cache.disable with a OMAP4 |