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| author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2009-07-24 10:43:01 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-21 15:02:15 (GMT) |
| commit | 40262b2b6efac507005a2c981175266bf81152a7 (patch) | |
| tree | 8d5ed29c6ffb02702e6d790966f97f24a5bff796 /arch/arm | |
| parent | 6ff89e9d62014b0e21fad96cf4d72d68b3aa0d8c (diff) | |
| download | linux-40262b2b6efac507005a2c981175266bf81152a7.tar.xz | |
ARM: 5621/1: at91/dmaengine: integration of at_hdmac driver in at91sam9g45 series
This is the integration of DMA engine driver into at91sam9g45 series
device file.
The associated driver is at_hdmac.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45_devices.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index d746e86..45720c8 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -24,11 +24,59 @@ #include <mach/at91sam9g45.h> #include <mach/at91sam9g45_matrix.h> #include <mach/at91sam9_smc.h> +#include <mach/at_hdmac.h> #include "generic.h" /* -------------------------------------------------------------------- + * HDMAC - AHB DMA Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) +static u64 hdmac_dmamask = DMA_BIT_MASK(32); + +static struct at_dma_platform_data atdma_pdata = { + .nr_channels = 8, +}; + +static struct resource hdmac_resources[] = { + [0] = { + .start = AT91_BASE_SYS + AT91_DMA, + .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = AT91SAM9G45_ID_DMA, + .end = AT91SAM9G45_ID_DMA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at_hdmac_device = { + .name = "at_hdmac", + .id = -1, + .dev = { + .dma_mask = &hdmac_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &atdma_pdata, + }, + .resource = hdmac_resources, + .num_resources = ARRAY_SIZE(hdmac_resources), +}; + +void __init at91_add_device_hdmac(void) +{ + dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); + dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask); + platform_device_register(&at_hdmac_device); +} +#else +void __init at91_add_device_hdmac(void) {} +#endif + + +/* -------------------------------------------------------------------- * USB Host (OHCI) * -------------------------------------------------------------------- */ @@ -1220,6 +1268,7 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_hdmac(); at91_add_device_rtc(); at91_add_device_rtt(); at91_add_device_watchdog(); |