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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2006-09-26 06:32:13 (GMT)
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 15:48:54 (GMT)
commit5f97f7f9400de47ae837170bb274e90ad3934386 (patch)
tree514451e6dc6b46253293a00035d375e77b1c65ed /arch/avr32/lib/strnlen_user.S
parent53e62d3aaa60590d4a69b4e07c29f448b5151047 (diff)
downloadlinux-5f97f7f9400de47ae837170bb274e90ad3934386.tar.xz
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/avr32/lib/strnlen_user.S')
-rw-r--r--arch/avr32/lib/strnlen_user.S67
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/avr32/lib/strnlen_user.S b/arch/avr32/lib/strnlen_user.S
new file mode 100644
index 0000000..65ce11a
--- /dev/null
+++ b/arch/avr32/lib/strnlen_user.S
@@ -0,0 +1,67 @@
+/*
+ * Copy to/from userspace with optional address space checking.
+ *
+ * Copyright 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/page.h>
+#include <asm/thread_info.h>
+#include <asm/processor.h>
+#include <asm/asm.h>
+
+ .text
+ .align 1
+ .global strnlen_user
+ .type strnlen_user, "function"
+strnlen_user:
+ branch_if_kernel r8, __strnlen_user
+ sub r8, r11, 1
+ add r8, r12
+ retcs 0
+ brmi adjust_length /* do a closer inspection */
+
+ .global __strnlen_user
+ .type __strnlen_user, "function"
+__strnlen_user:
+ mov r10, r12
+
+10: ld.ub r8, r12++
+ cp.w r8, 0
+ breq 2f
+ sub r11, 1
+ brne 10b
+
+ sub r12, -1
+2: sub r12, r10
+ retal r12
+
+
+ .type adjust_length, "function"
+adjust_length:
+ cp.w r12, 0 /* addr must always be < TASK_SIZE */
+ retmi 0
+
+ pushm lr
+ lddpc lr, _task_size
+ sub r11, lr, r12
+ mov r9, r11
+ rcall __strnlen_user
+ cp.w r12, r9
+ brgt 1f
+ popm pc
+1: popm pc, r12=0
+
+ .align 2
+_task_size:
+ .long TASK_SIZE
+
+ .section .fixup, "ax"
+ .align 1
+19: retal 0
+
+ .section __ex_table, "a"
+ .align 2
+ .long 10b, 19b