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authorMika Westerberg <mika.westerberg@linux.intel.com>2016-02-08 15:14:31 (GMT)
committerMark Brown <broonie@kernel.org>2016-02-09 19:01:11 (GMT)
commit30f3a6ab44d8d06bb3d94f6320e4aa76df59d025 (patch)
tree123be907145582b282d6054f163c14ec4ddc65aa /arch/avr32
parentc1e4a53c6b8161ded3a44e3352ef38206d0967ea (diff)
downloadlinux-30f3a6ab44d8d06bb3d94f6320e4aa76df59d025.tar.xz
spi: pxa2xx: Add support for both chip selects on Intel Braswell
Intel Braswell LPSS SPI controller actually has two chip selects and there is no capabilities register where this could be found out. These two chip selects are controlled by bits which are in slightly differrent location than Broxton has. Braswell Windows driver also starts chip select (ACPI DeviceSelection) numbering from 1 so translate it to be suitable for Linux as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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