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author | Mike Frysinger <vapier@gentoo.org> | 2011-06-27 03:11:19 (GMT) |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-07-23 05:18:29 (GMT) |
commit | eed7b8365807549c67613ea7d9a451262050ba3e (patch) | |
tree | 784d91e216a393904d5bb74bfcb00a878c159d10 /arch/blackfin/include | |
parent | d7228e7eb9bd9d65ddb5338fc9574f34ea6d53e1 (diff) | |
download | linux-eed7b8365807549c67613ea7d9a451262050ba3e.tar.xz |
Blackfin: dpmc: optimize hibernate/resume path
The current save logic used in hibernation is to do a MMR load (base +
offset) into a register, and then push that onto the stack. Then when
restoring, pop off the stack into a register followed by a MMR store
(base + offset). These use plenty of 32bit insns rather than 16bit,
are pretty long winded, and full of pipeline bubbles.
So, by taking advantage of MMRs that are contiguous, the multi-register
push/pop insn, and register abuse, we can shrink this code considerably.
When saving, the new logic does a lot of loads into the data and pointer
registers before executing a single multi-register push insn. Then when
restoring, we do a single multi-register pop insn followed by a lot of
stores. Overall, this allows us to cut the insn count by ~30%, the code
size by ~45%, and drastically reduce the register hazards that trigger
bubbles in the pipeline.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r-- | arch/blackfin/include/asm/dpmc.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h index d1ba877..c4ec959 100644 --- a/arch/blackfin/include/asm/dpmc.h +++ b/arch/blackfin/include/asm/dpmc.h @@ -117,7 +117,6 @@ #ifndef __ASSEMBLY__ void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); -void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void do_hibernate(int wakeup); void set_dram_srfs(void); |