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authorMike Frysinger <vapier@gentoo.org>2011-03-30 07:59:00 (GMT)
committerMike Frysinger <vapier@gentoo.org>2011-05-25 12:13:42 (GMT)
commit3dd666067d2b285724c828946e83100ea4c43d4b (patch)
treebb0e0c060013e12a7d6674f8139a5fec59cf6fbc /arch/blackfin/mach-bf538/include
parent6adc521e7127732512ebd7fcfd3926d7970a82e1 (diff)
downloadlinux-3dd666067d2b285724c828946e83100ea4c43d4b.tar.xz
Blackfin: clean up style in irq defines
These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf538/include')
-rw-r--r--arch/blackfin/mach-bf538/include/mach/irq.h45
1 files changed, 23 insertions, 22 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h
index 08d4767..07ca069 100644
--- a/arch/blackfin/mach-bf538/include/mach/irq.h
+++ b/arch/blackfin/mach-bf538/include/mach/irq.h
@@ -9,7 +9,7 @@
#include <mach-common/irq.h>
-#define NR_PERI_INTS (2 * 32)
+#define NR_PERI_INTS (2 * 32)
#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */
#define IRQ_DMA0_ERROR BFIN_IRQ(1) /* DMA Error 0 (generic) */
@@ -62,26 +62,26 @@
#define SYS_IRQS BFIN_IRQ(63) /* 70 */
-#define IRQ_PF0 71
-#define IRQ_PF1 72
-#define IRQ_PF2 73
-#define IRQ_PF3 74
-#define IRQ_PF4 75
-#define IRQ_PF5 76
-#define IRQ_PF6 77
-#define IRQ_PF7 78
-#define IRQ_PF8 79
-#define IRQ_PF9 80
-#define IRQ_PF10 81
-#define IRQ_PF11 82
-#define IRQ_PF12 83
-#define IRQ_PF13 84
-#define IRQ_PF14 85
-#define IRQ_PF15 86
-
-#define GPIO_IRQ_BASE IRQ_PF0
-
-#define NR_MACH_IRQS (IRQ_PF15 + 1)
+#define IRQ_PF0 71
+#define IRQ_PF1 72
+#define IRQ_PF2 73
+#define IRQ_PF3 74
+#define IRQ_PF4 75
+#define IRQ_PF5 76
+#define IRQ_PF6 77
+#define IRQ_PF7 78
+#define IRQ_PF8 79
+#define IRQ_PF9 80
+#define IRQ_PF10 81
+#define IRQ_PF11 82
+#define IRQ_PF12 83
+#define IRQ_PF13 84
+#define IRQ_PF14 85
+#define IRQ_PF15 86
+
+#define GPIO_IRQ_BASE IRQ_PF0
+
+#define NR_MACH_IRQS (IRQ_PF15 + 1)
/* IAR0 BIT FIELDS */
#define IRQ_PLL_WAKEUP_POS 0
@@ -144,4 +144,5 @@
#define IRQ_CAN_TX_POS 0
#define IRQ_MEM1_DMA0_POS 4
#define IRQ_MEM1_DMA1_POS 8
-#endif /* _BF538_IRQ_H_ */
+
+#endif