diff options
author | Graf Yang <graf.yang@analog.com> | 2010-01-28 10:46:55 (GMT) |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-03-18 08:01:03 (GMT) |
commit | 6f546bc3ac9eedbf770bf3bcbc45ce2ea32c94ad (patch) | |
tree | 7089509d165a19156c3be21950f96160fb1f06a1 /arch/blackfin/mach-bf561/secondary.S | |
parent | 820b127dae869cbbd2133f066e8b8f32a90d46e5 (diff) | |
download | linux-6f546bc3ac9eedbf770bf3bcbc45ce2ea32c94ad.tar.xz |
Blackfin: SMP: implement cpu_freq support
Re-use some of the existing cpu hotplugging code in the process.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561/secondary.S')
-rw-r--r-- | arch/blackfin/mach-bf561/secondary.S | 26 |
1 files changed, 9 insertions, 17 deletions
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S index ef9acf2..148e507 100644 --- a/arch/blackfin/mach-bf561/secondary.S +++ b/arch/blackfin/mach-bf561/secondary.S @@ -162,39 +162,31 @@ ENTRY(_coreb_trampoline_start) ENDPROC(_coreb_trampoline_start) ENTRY(_coreb_trampoline_end) +#ifdef CONFIG_HOTPLUG_CPU .section ".text" -ENTRY(_set_sicb_iwr) - P0.H = hi(SICB_IWR0); - P0.L = lo(SICB_IWR0); - P1.H = hi(SICB_IWR1); - P1.L = lo(SICB_IWR1); - [P0] = R0; - [P1] = R1; - SSYNC; - RTS; -ENDPROC(_set_sicb_iwr) - -ENTRY(_coreb_sleep) +ENTRY(_coreb_die) sp.l = lo(INITIAL_STACK); sp.h = hi(INITIAL_STACK); fp = sp; usp = sp; - call _set_sicb_iwr; - CLI R2; SSYNC; IDLE; STI R2; R0 = IWR_DISABLE_ALL; - R1 = IWR_DISABLE_ALL; - call _set_sicb_iwr; + P0.H = hi(SYSMMR_BASE); + P0.L = lo(SYSMMR_BASE); + [P0 + (SICB_IWR0 - SYSMMR_BASE)] = R0; + [P0 + (SICB_IWR1 - SYSMMR_BASE)] = R0; + SSYNC; p0.h = hi(COREB_L1_CODE_START); p0.l = lo(COREB_L1_CODE_START); jump (p0); -ENDPROC(_coreb_sleep) +ENDPROC(_coreb_die) +#endif __INIT ENTRY(_coreb_start) |