diff options
| author | Yi Li <yi.li@analog.com> | 2009-12-28 10:21:49 (GMT) |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2010-03-09 05:30:48 (GMT) |
| commit | 0d152c27e336b5fd777da7dd3e814617e7305afd (patch) | |
| tree | 2863b1b2f0fe0676a5928b197c8d1d289ab71777 /arch/blackfin/mach-bf561 | |
| parent | 682f5dc4ed7cdef1f55e40ee505c4346dfa6fa91 (diff) | |
| download | linux-0d152c27e336b5fd777da7dd3e814617e7305afd.tar.xz | |
Blackfin: SMP: make core timers per-cpu clock events for HRT
SMP systems require per-cpu local clock event devices in order to enable
HRT support. One a BF561, we can use local core timer for this purpose.
Originally, there was one global core-timer clock event device set up for
core A.
To accomplish this feat, we need to split the gptimer0/core timer logic
so that each is a standalone clock event. There is no requirement that
we only have one clock event source anyways. Once we have this, we just
define per-cpu clock event devices for each local core timer.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/smp.h | 2 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf561/smp.c | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/smp.h b/arch/blackfin/mach-bf561/include/mach/smp.h index 390c7f4..2c8c514 100644 --- a/arch/blackfin/mach-bf561/include/mach/smp.h +++ b/arch/blackfin/mach-bf561/include/mach/smp.h @@ -25,4 +25,6 @@ void platform_send_ipi_cpu(unsigned int cpu); void platform_clear_ipi(unsigned int cpu); +void bfin_local_timer_setup(void); + #endif /* !_MACH_BF561_SMP */ diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index ec93f3e..9036942 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -11,6 +11,7 @@ #include <linux/delay.h> #include <asm/smp.h> #include <asm/dma.h> +#include <asm/time.h> static DEFINE_SPINLOCK(boot_lock); @@ -144,3 +145,20 @@ void platform_clear_ipi(unsigned int cpu) bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu))); SSYNC(); } + +/* + * Setup core B's local core timer. + * In SMP, core timer is used for clock event device. + */ +void __cpuinit bfin_local_timer_setup(void) +{ +#if defined(CONFIG_TICKSOURCE_CORETMR) + bfin_coretmr_init(); + bfin_coretmr_clockevent_init(); + get_irq_chip(IRQ_CORETMR)->unmask(IRQ_CORETMR); +#else + /* Power down the core timer, just to play safe. */ + bfin_write_TCNTL(0); +#endif + +} |