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authorKen Cox <jkc@redhat.com>2012-07-19 03:19:10 (GMT)
committerMark Salter <msalter@redhat.com>2012-07-19 03:52:31 (GMT)
commitdbe91a2e6e53aa85efa0aac86e3a22ba95f8b85f (patch)
treeb4c4275ea7fa1797c0ff66df5661bbfaa81f91b6 /arch/c6x/boot/dts/evmc6678.dts
parentf84f1f462bfaf0e45511f97ef54068b8539a7af6 (diff)
downloadlinux-dbe91a2e6e53aa85efa0aac86e3a22ba95f8b85f.tar.xz
C6X: add basic support for TMS320C6678 SoC
This patch adds support for the TMS320C6678 SoC on an EVMC6678LE evaluation board. The 6678 is a C66x family CPU which is very similar to the already supported C64x CPUs with the addition of floating point instructions. Signed-off-by: Ken Cox <jkc@redhat.com> Signed-off-by: Mark Salter <msalter@redhat.com> CC: Aurelien Jacquiot <a-jacquiot@ti.com> CC: linux-c6x-dev@linux-c6x.org
Diffstat (limited to 'arch/c6x/boot/dts/evmc6678.dts')
-rw-r--r--arch/c6x/boot/dts/evmc6678.dts83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/c6x/boot/dts/evmc6678.dts b/arch/c6x/boot/dts/evmc6678.dts
new file mode 100644
index 0000000..ab68630
--- /dev/null
+++ b/arch/c6x/boot/dts/evmc6678.dts
@@ -0,0 +1,83 @@
+/*
+ * arch/c6x/boot/dts/evmc6678.dts
+ *
+ * EVMC6678 Evaluation Platform For TMS320C6678
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated
+ *
+ * Author: Ken Cox <jkc@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ */
+
+/dts-v1/;
+
+/include/ "tms320c6678.dtsi"
+
+/ {
+ model = "Advantech EVMC6678";
+ compatible = "advantech,evmc6678";
+
+ chosen {
+ bootargs = "root=/dev/nfs ip=dhcp rw";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>;
+ };
+
+ soc {
+ megamod_pic: interrupt-controller@1800000 {
+ interrupts = < 12 13 14 15 >;
+ };
+
+ timer8: timer@2280000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 66 >;
+ };
+
+ timer9: timer@2290000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 68 >;
+ };
+
+ timer10: timer@22A0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 70 >;
+ };
+
+ timer11: timer@22B0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 72 >;
+ };
+
+ timer12: timer@22C0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 74 >;
+ };
+
+ timer13: timer@22D0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 76 >;
+ };
+
+ timer14: timer@22E0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 78 >;
+ };
+
+ timer15: timer@22F0000 {
+ interrupt-parent = <&megamod_pic>;
+ interrupts = < 80 >;
+ };
+
+ clock-controller@2310000 {
+ clock-frequency = <100000000>;
+ };
+ };
+};