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| author | Jan Beulich <jbeulich@novell.com> | 2006-01-06 08:11:49 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-06 16:33:34 (GMT) |
| commit | d43c6e8083ac8baeb1a167510aea34fcef396e33 (patch) | |
| tree | 45feb3824511d67330bb5d2e5451fa5f66dd7542 /arch/i386 | |
| parent | e43d674f44dc885a2476cab3537e639d9eaa31a9 (diff) | |
| download | linux-d43c6e8083ac8baeb1a167510aea34fcef396e33.tar.xz | |
[PATCH] i386: move SIMD initialization
Move some code unrelated to any dealing with hardware bugs from i386's
bugs.h to a more logical place.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386')
| -rw-r--r-- | arch/i386/kernel/traps.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c index bb36a98..f0c4060 100644 --- a/arch/i386/kernel/traps.c +++ b/arch/i386/kernel/traps.c @@ -1098,6 +1098,28 @@ void __init trap_init(void) #endif set_trap_gate(19,&simd_coprocessor_error); + if (cpu_has_fxsr) { + /* + * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned. + * Generates a compile-time "error: zero width for bit-field" if + * the alignment is wrong. + */ + struct fxsrAlignAssert { + int _:!(offsetof(struct task_struct, + thread.i387.fxsave) & 15); + }; + + printk(KERN_INFO "Enabling fast FPU save and restore... "); + set_in_cr4(X86_CR4_OSFXSR); + printk("done.\n"); + } + if (cpu_has_xmm) { + printk(KERN_INFO "Enabling unmasked SIMD FPU exception " + "support... "); + set_in_cr4(X86_CR4_OSXMMEXCPT); + printk("done.\n"); + } + set_system_gate(SYSCALL_VECTOR,&system_call); /* |