m68knommu: make ColdFire Interrupt Source register definitions absolute addresses

Make all definitions of the ColdFire Interrupt Source registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 3983404..2b21787 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -27,10 +27,10 @@
 #define	MCFSIM_APMR		0x0e		/* Active Low Power reg (r/w) */
 #define	MCFSIM_DIR		0x10		/* Device Identity reg (r/w) */
 
-#define	MCFSIM_ICR1		0x20		/* Intr Ctrl reg 1 (r/w) */
-#define	MCFSIM_ICR2		0x24		/* Intr Ctrl reg 2 (r/w) */
-#define	MCFSIM_ICR3		0x28		/* Intr Ctrl reg 3 (r/w) */
-#define	MCFSIM_ICR4		0x2c		/* Intr Ctrl reg 4 (r/w) */
+#define	MCFSIM_ICR1		(MCF_MBAR + 0x20)	/* Intr Ctrl reg 1 */
+#define	MCFSIM_ICR2		(MCF_MBAR + 0x24)	/* Intr Ctrl reg 2 */
+#define	MCFSIM_ICR3		(MCF_MBAR + 0x28)	/* Intr Ctrl reg 3 */
+#define	MCFSIM_ICR4		(MCF_MBAR + 0x2c)	/* Intr Ctrl reg 4 */
 
 #define	MCFSIM_ISR		(MCF_MBAR + 0x30)	/* Intr Source */
 #define	MCFSIM_PITR		(MCF_MBAR + 0x34)	/* Intr Transition */