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| author | Greg Ungerer <gerg@uclinux.org> | 2009-05-19 05:00:01 (GMT) |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-15 23:43:52 (GMT) |
| commit | f6a66276f5fdc018d2a9378c71de3bae13c588d7 (patch) | |
| tree | 5a6148447a9d7b379e31fc4d0b6ddedcc189f80a /arch/m68k | |
| parent | 04b75b10dceadf937e3707ecc3dfccf6a076fd29 (diff) | |
| download | linux-f6a66276f5fdc018d2a9378c71de3bae13c588d7.tar.xz | |
m68knommu: clean up ColdFire 532x CPU timer setup
The newer ColdFire 532x family of CPU's uses the old timer, but has a
newer interrupt controller. It doesn't need the special timer setup
that was required when using the older interrupt controller. Remove the
dead timer irq and level setting code, and define the hard coded vector.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
| -rw-r--r-- | arch/m68k/include/asm/m532xsim.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 021a0e1..36bf15a 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -66,6 +66,11 @@ #define MCFSIM_ICR_TIMER1 (0xFC048040+32) #define MCFSIM_ICR_TIMER2 (0xFC048040+33) +/* + * Define system peripheral IRQ usage. + */ +#define MCF_IRQ_TIMER (64 + 32) /* Timer0 */ +#define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */ /* * Define the Cache register flags. |