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author | Michal Simek <monstr@monstr.eu> | 2011-04-04 13:46:03 (GMT) |
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committer | Michal Simek <monstr@monstr.eu> | 2012-03-23 08:28:18 (GMT) |
commit | 1451d1d88b9aa32ac9ee54180239e9b34b6f9e86 (patch) | |
tree | 417fbc899c6469af1c0b2cf2dc1a99f050cf48fd /arch/microblaze/kernel/misc.S | |
parent | 95b0f9ea66661681f6ae081ea28416744d622c07 (diff) | |
download | linux-1451d1d88b9aa32ac9ee54180239e9b34b6f9e86.tar.xz |
microblaze: Introduce TLB skip size
TLB skip size direct how many TLBs is skipped.
Currently TLB0 and TLB1 are used for Linux kernel mapping
that's why their are skipped.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/kernel/misc.S')
-rw-r--r-- | arch/microblaze/kernel/misc.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S index 206da3d..c9090d7 100644 --- a/arch/microblaze/kernel/misc.S +++ b/arch/microblaze/kernel/misc.S @@ -36,7 +36,7 @@ _tlbia_1: nop mts rtlbhi, r0 /* flush: ensure V is clear */ nop - addik r11, r12, -2 + addik r11, r12, -MICROBLAZE_TLB_SKIP bneid r11, _tlbia_1 /* loop for all entries */ addik r12, r12, -1 /* sync */ @@ -75,7 +75,7 @@ early_console_reg_tlb_alloc: * Load a TLB entry for the UART, so that microblaze_progress() can use * the UARTs nice and early. We use a 4k real==virtual mapping. */ - ori r4, r0, MICROBLAZE_TLB_SIZE - 1 + ori r4, r0, 63 mts rtlbx, r4 /* TLB slot 63 */ or r4,r5,r0 |