diff options
author | Hauke Mehrtens <hauke@hauke-m.de> | 2011-07-22 23:20:13 (GMT) |
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committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 18:29:31 (GMT) |
commit | a656ffcbc7a98a80d2136ae6bbdd8ae2eb48c78a (patch) | |
tree | 9b732b9a15ad8cc9c8790f36f3ac9a00bf6972c2 /arch/mips/bcm47xx | |
parent | 08ccf57283f89adbc2ff897ad82d6ad4560db7cd (diff) | |
download | linux-a656ffcbc7a98a80d2136ae6bbdd8ae2eb48c78a.tar.xz |
bcm47xx: make it possible to build bcm47xx without ssb.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch/mips/bcm47xx')
-rw-r--r-- | arch/mips/bcm47xx/Kconfig | 18 | ||||
-rw-r--r-- | arch/mips/bcm47xx/Makefile | 3 | ||||
-rw-r--r-- | arch/mips/bcm47xx/gpio.c | 6 | ||||
-rw-r--r-- | arch/mips/bcm47xx/nvram.c | 4 | ||||
-rw-r--r-- | arch/mips/bcm47xx/serial.c | 4 | ||||
-rw-r--r-- | arch/mips/bcm47xx/setup.c | 8 | ||||
-rw-r--r-- | arch/mips/bcm47xx/time.c | 2 |
7 files changed, 44 insertions, 1 deletions
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig new file mode 100644 index 0000000..0346f92 --- /dev/null +++ b/arch/mips/bcm47xx/Kconfig @@ -0,0 +1,18 @@ +if BCM47XX + +config BCM47XX_SSB + bool "SSB Support for Broadcom BCM47XX" + select SYS_HAS_CPU_MIPS32_R1 + select SSB + select SSB_DRIVER_MIPS + select SSB_DRIVER_EXTIF + select SSB_EMBEDDED + select SSB_B43_PCI_BRIDGE if PCI + select SSB_PCICORE_HOSTMODE if PCI + default y + help + Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. + + This will generate an image with support for SSB and MIPS32 R1 instruction set. + +endif diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile index 7465e8a..4add173 100644 --- a/arch/mips/bcm47xx/Makefile +++ b/arch/mips/bcm47xx/Makefile @@ -3,4 +3,5 @@ # under Linux. # -obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o +obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o +obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c index 99e1c50..2b804c367 100644 --- a/arch/mips/bcm47xx/gpio.c +++ b/arch/mips/bcm47xx/gpio.c @@ -21,6 +21,7 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); int gpio_request(unsigned gpio, const char *tag) { switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) @@ -34,6 +35,7 @@ int gpio_request(unsigned gpio, const char *tag) return -EBUSY; return 0; +#endif } return -EINVAL; } @@ -42,6 +44,7 @@ EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned gpio) { switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) @@ -53,6 +56,7 @@ void gpio_free(unsigned gpio) clear_bit(gpio, gpio_in_use); return; +#endif } } EXPORT_SYMBOL(gpio_free); @@ -60,6 +64,7 @@ EXPORT_SYMBOL(gpio_free); int gpio_to_irq(unsigned gpio) { switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; @@ -67,6 +72,7 @@ int gpio_to_irq(unsigned gpio) return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; else return -EINVAL; +#endif } return -EINVAL; } diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index bcac2ff..4e994ed 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c @@ -26,7 +26,9 @@ static char nvram_buf[NVRAM_SPACE]; /* Probe for NVRAM header */ static void early_nvram_init(void) { +#ifdef CONFIG_BCM47XX_SSB struct ssb_mipscore *mcore_ssb; +#endif struct nvram_header *header; int i; u32 base = 0; @@ -35,11 +37,13 @@ static void early_nvram_init(void) u32 *src, *dst; switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: mcore_ssb = &bcm47xx_bus.ssb.mipscore; base = mcore_ssb->flash_window; lim = mcore_ssb->flash_window_size; break; +#endif } off = FLASH_MIN; diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c index 17c67e2..fcef688 100644 --- a/arch/mips/bcm47xx/serial.c +++ b/arch/mips/bcm47xx/serial.c @@ -23,6 +23,7 @@ static struct platform_device uart8250_device = { }, }; +#ifdef CONFIG_BCM47XX_SSB static int __init uart8250_init_ssb(void) { int i; @@ -44,12 +45,15 @@ static int __init uart8250_init_ssb(void) } return platform_device_register(&uart8250_device); } +#endif static int __init uart8250_init(void) { switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: return uart8250_init_ssb(); +#endif } return -EINVAL; } diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index 271cedb..142cf1b 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c @@ -47,9 +47,11 @@ static void bcm47xx_machine_restart(char *command) local_irq_disable(); /* Set the watchdog timer to reset immediately */ switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); break; +#endif } while (1) cpu_relax(); @@ -60,14 +62,17 @@ static void bcm47xx_machine_halt(void) /* Disable interrupts and watchdog and spin forever */ local_irq_disable(); switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); break; +#endif } while (1) cpu_relax(); } +#ifdef CONFIG_BCM47XX_SSB #define READ_FROM_NVRAM(_outvar, name, buf) \ if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ sprom->_outvar = simple_strtoul(buf, NULL, 0); @@ -288,13 +293,16 @@ static void __init bcm47xx_register_ssb(void) } } } +#endif void __init plat_mem_setup(void) { struct cpuinfo_mips *c = ¤t_cpu_data; +#ifdef CONFIG_BCM47XX_SSB bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; bcm47xx_register_ssb(); +#endif _machine_restart = bcm47xx_machine_restart; _machine_halt = bcm47xx_machine_halt; diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c index 50aea2e..03dfc65 100644 --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c @@ -40,9 +40,11 @@ void __init plat_time_init(void) write_c0_compare(0xffff); switch (bcm47xx_bus_type) { +#ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; break; +#endif } if (!hz) |