diff options
author | Jonas Gorski <jogo@openwrt.org> | 2014-07-12 10:49:35 (GMT) |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 13:27:47 (GMT) |
commit | 86ee4333ba991654f21b7a9e7a7bff0b319f0800 (patch) | |
tree | 878141286a33f5809675f5274e5fcd479a3e15bd /arch/mips/bcm63xx | |
parent | a6dfde817cb45934e87d4493df0df3c12a6604e1 (diff) | |
download | linux-86ee4333ba991654f21b7a9e7a7bff0b319f0800.tar.xz |
MIPS: BCM63xx: Replace irq dispatch code with a generic version
The generic version uses a variable length of u32 registers instead of u32/u64.
This allows easier support for "wider" registers without having to rewrite
everything.
This "generic" version is as fast as the old version in the best case
(i == next set bit), and twice as fast in the worst case in 64 bits.
Using a macro was chosen over a (forced) inline version because gcc generated
more compact code with the macro.
The change from (signed) int to unsigned int for i and to_call was intentional
as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
optimise the code a bit further.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7316/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r-- | arch/mips/bcm63xx/irq.c | 130 |
1 files changed, 56 insertions, 74 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index f6c933a..db9f2ef 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -51,47 +51,65 @@ static inline void handle_internal(int intbit) * will resume the loop where it ended the last time we left this * function. */ -static void __dispatch_internal_32(void) -{ - u32 pending; - static int i; - - pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr); - - if (!pending) - return ; - - while (1) { - int to_call = i; - i = (i + 1) & 0x1f; - if (pending & (1 << to_call)) { - handle_internal(to_call); - break; - } - } +#define BUILD_IPIC_INTERNAL(width) \ +void __dispatch_internal_##width(void) \ +{ \ + u32 pending[width / 32]; \ + unsigned int src, tgt; \ + bool irqs_pending = false; \ + static unsigned int i; \ + \ + /* read registers in reverse order */ \ + for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \ + u32 val; \ + \ + val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \ + val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \ + pending[--tgt] = val; \ + \ + if (val) \ + irqs_pending = true; \ + } \ + \ + if (!irqs_pending) \ + return; \ + \ + while (1) { \ + unsigned int to_call = i; \ + \ + i = (i + 1) & (width - 1); \ + if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \ + handle_internal(to_call); \ + break; \ + } \ + } \ +} \ + \ +static void __internal_irq_mask_##width(unsigned int irq) \ +{ \ + u32 val; \ + unsigned reg = (irq / 32) ^ (width/32 - 1); \ + unsigned bit = irq & 0x1f; \ + \ + val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ + val &= ~(1 << bit); \ + bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ +} \ + \ +static void __internal_irq_unmask_##width(unsigned int irq) \ +{ \ + u32 val; \ + unsigned reg = (irq / 32) ^ (width/32 - 1); \ + unsigned bit = irq & 0x1f; \ + \ + val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ + val |= (1 << bit); \ + bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ } -static void __dispatch_internal_64(void) -{ - u64 pending; - static int i; - - pending = bcm_readq(irq_stat_addr) & bcm_readq(irq_mask_addr); - - if (!pending) - return ; - - while (1) { - int to_call = i; - - i = (i + 1) & 0x3f; - if (pending & (1ull << to_call)) { - handle_internal(to_call); - break; - } - } -} +BUILD_IPIC_INTERNAL(32); +BUILD_IPIC_INTERNAL(64); asmlinkage void plat_irq_dispatch(void) { @@ -128,42 +146,6 @@ asmlinkage void plat_irq_dispatch(void) * internal IRQs operations: only mask/unmask on PERF irq mask * register. */ -static void __internal_irq_mask_32(unsigned int irq) -{ - u32 mask; - - mask = bcm_readl(irq_mask_addr); - mask &= ~(1 << irq); - bcm_writel(mask, irq_mask_addr); -} - -static void __internal_irq_mask_64(unsigned int irq) -{ - u64 mask; - - mask = bcm_readq(irq_mask_addr); - mask &= ~(1ull << irq); - bcm_writeq(mask, irq_mask_addr); -} - -static void __internal_irq_unmask_32(unsigned int irq) -{ - u32 mask; - - mask = bcm_readl(irq_mask_addr); - mask |= (1 << irq); - bcm_writel(mask, irq_mask_addr); -} - -static void __internal_irq_unmask_64(unsigned int irq) -{ - u64 mask; - - mask = bcm_readq(irq_mask_addr); - mask |= (1ull << irq); - bcm_writeq(mask, irq_mask_addr); -} - static void bcm63xx_internal_irq_mask(struct irq_data *d) { internal_irq_mask(d->irq - IRQ_INTERNAL_BASE); |