diff options
| author | David Daney <david.daney@cavium.com> | 2012-07-05 16:12:39 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-23 12:54:53 (GMT) |
| commit | 368bec0d4a84f78f8c2be8441916d905a8da73c2 (patch) | |
| tree | 29fd1d32da4eec4804908ac558469dfe0fe689bb /arch/mips/cavium-octeon/octeon-irq.c | |
| parent | 2fd46f47be0f96be700053d6caa8dcb14453a520 (diff) | |
| download | linux-368bec0d4a84f78f8c2be8441916d905a8da73c2.tar.xz | |
netdev: octeon_mgmt: Convert to use device tree.
The device tree will supply the register bank base addresses, make
register addressing relative to those. PHY connection is now
described by the device tree.
The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now
unused and interfere with the irq_domain used for device tree irq
mapping.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/octeon-irq.c')
| -rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 2a661ad..5fb76aa 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -1197,7 +1197,6 @@ static void __init octeon_irq_init_ciu(void) octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq); - octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII0, 0, 62, chip, handle_level_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq); /* CIU_1 */ @@ -1206,7 +1205,6 @@ static void __init octeon_irq_init_ciu(void) octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART2, 1, 16, chip, handle_level_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq); - octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII1, 1, 18, chip, handle_level_irq); gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); if (gpio_node) { |