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| author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2014-08-13 07:01:57 (GMT) |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-08-13 08:20:37 (GMT) |
| commit | b0aa44a3dfae3d8f45bd1264349aa87f87b7774f (patch) | |
| tree | 92b61ca0ea8b8cbd4ec4c9934aafa39eab29fd4d /arch/mips/configs | |
| parent | 2fabf084b6ad6337675d700b159a6091023544f2 (diff) | |
| download | linux-b0aa44a3dfae3d8f45bd1264349aa87f87b7774f.tar.xz | |
powerpc/thp: Add write barrier after updating the valid bit
With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.
CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/mips/configs')
0 files changed, 0 insertions, 0 deletions