diff options
| author | Raghu Gandham <Raghu.Gandham@imgtec.com> | 2013-04-10 21:30:12 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 15:55:21 (GMT) |
| commit | 0ab2b7d08ea7226dc72ff0f8c05f470566facf7c (patch) | |
| tree | 7b791c6907a47733b1256da5e20600d182b36d40 /arch/mips/include/asm/gic.h | |
| parent | 2675fa7c7b46842f82b2766b5abe80e16ce32977 (diff) | |
| download | linux-0ab2b7d08ea7226dc72ff0f8c05f470566facf7c.tar.xz | |
MIPS: Add new GIC clockevent driver.
Add new clockevent driver that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/gic.h')
| -rw-r--r-- | arch/mips/include/asm/gic.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 398cf54..7153b32 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h @@ -202,7 +202,7 @@ #define GIC_VPE_WD_COUNT0_OFS 0x0094 #define GIC_VPE_WD_INITIAL0_OFS 0x0098 #define GIC_VPE_COMPARE_LO_OFS 0x00a0 -#define GIC_VPE_COMPARE_HI 0x00a4 +#define GIC_VPE_COMPARE_HI_OFS 0x00a4 #define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100 #define GIC_VPE_EIC_SS(intr) \ @@ -373,7 +373,10 @@ extern void gic_init(unsigned long gic_base_addr, unsigned long gic_addrspace_size, struct gic_intr_map *intrmap, unsigned int intrmap_size, unsigned int irqbase); extern void gic_clocksource_init(unsigned int); +extern unsigned int gic_compare_int (void); extern cycle_t gic_read_count(void); +extern cycle_t gic_read_compare(void); +extern void gic_write_compare(cycle_t cnt); extern void gic_send_ipi(unsigned int intr); extern unsigned int plat_ipi_call_int_xlate(unsigned int); extern unsigned int plat_ipi_resched_int_xlate(unsigned int); |