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author | Maciej W. Rozycki <macro@linux-mips.org> | 2013-09-22 20:55:19 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-10-29 20:24:42 (GMT) |
commit | 0fabe1021f8bc9cffdede4ddad0dd04d43c5166c (patch) | |
tree | 0b1c61e3ef7c1858eb17603633b35c32d92933ad /arch/mips/include | |
parent | 4e7f72660c39a81cc5745d5c6f23f9500f80d8d8 (diff) | |
download | linux-0fabe1021f8bc9cffdede4ddad0dd04d43c5166c.tar.xz |
MIPS: DECstation I/O ASIC DMA interrupt classes
This change complements commits d0da7c002f7b2a93582187a9e3f73891a01d8ee4
[MIPS: DEC: Convert to new irq_chip functions] and
5359b938c088423a28c41499f183cd10824c1816 [MIPS: DECstation I/O ASIC DMA
interrupt handling fix] and implements automatic handling of the two
classes of DMA interrupts the I/O ASIC implements, informational and
errors.
Informational DMA interrupts do not stop the transfer and use the
`handle_edge_irq' handler that clears the request right away so that
another request may be recorded while the previous is being handled.
DMA error interrupts stop the transfer and require a corrective action
before DMA can be reenabled. Therefore they use the `handle_fasteoi_irq'
handler that only clears the request on the way out. Because MIPS
processor interrupt inputs, one of which the I/O ASIC's interrupt
controller is cascaded to, are level-triggered it is recommended that
error DMA interrupt action handlers are registered with the IRQF_ONESHOT
flag set so that they are run with the interrupt line masked.
This change removes the export of clear_ioasic_dma_irq that now does not
have to be called by device drivers to clear interrupts explicitly
anymore. Originally these interrupts were cleared in the .end handler of
the `irq_chip' structure, before it was removed.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/dec/ioasic.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/dec/ioasic.h b/arch/mips/include/asm/dec/ioasic.h index a6e505a..be4d62a 100644 --- a/arch/mips/include/asm/dec/ioasic.h +++ b/arch/mips/include/asm/dec/ioasic.h @@ -31,8 +31,6 @@ static inline u32 ioasic_read(unsigned int reg) return ioasic_base[reg / 4]; } -extern void clear_ioasic_dma_irq(unsigned int irq); - extern void init_ioasic_irqs(int base); extern int dec_ioasic_clocksource_init(void); |