diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2016-08-26 14:17:38 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-10-04 23:31:20 (GMT) |
| commit | 7afd2a5aec2ea27ba87b3a423c5d782fe0f2b96b (patch) | |
| tree | 4ca9c5f7ada9115d7d60a23a7cd690209e6e8e8c /arch/mips/include | |
| parent | a34e93882de4e50e349d2d23b20dde5257d42f94 (diff) | |
| download | linux-7afd2a5aec2ea27ba87b3a423c5d782fe0f2b96b.tar.xz | |
MIPS: SEAD3: Probe EHCI controller using DT
Probe the SEAD3 EHCI controller using the generic-ehci driver & device
tree rather than platform code, in order to reduce the amount of the
latter.
Now that no devices probed from platform code require interrupts, remove
the retrieval of the IRQ domain & sead3int.h.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14051/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mips-boards/sead3int.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h deleted file mode 100644 index 7fdb9d4..0000000 --- a/arch/mips/include/asm/mips-boards/sead3int.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000,2012 MIPS Technologies, Inc. All rights reserved. - * Douglas Leung <douglas@mips.com> - * Steven J. Hill <sjhill@mips.com> - */ -#ifndef _MIPS_SEAD3INT_H -#define _MIPS_SEAD3INT_H - -#include <linux/irqchip/mips-gic.h> - -/* CPU interrupt offsets */ -#define CPU_INT_EHCI 2 - -/* GIC interrupt offsets */ -#define GIC_INT_EHCI GIC_SHARED_TO_HWIRQ(5) - -#endif /* !(_MIPS_SEAD3INT_H) */ |