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author | Huacai Chen <chenhc@lemote.com> | 2014-11-04 06:13:23 (GMT) |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-19 17:22:07 (GMT) |
commit | 7352c8b13dd9a848b0c5d6209d62761afb164dcb (patch) | |
tree | 307be3b53c379ccbcf63815f4f0701735dbac33b /arch/mips/include | |
parent | cc94ea31150f83d1f70ad854c920dd6b739c1628 (diff) | |
download | linux-7352c8b13dd9a848b0c5d6209d62761afb164dcb.tar.xz |
MIPS: Loongson: Set Loongson-3's ISA level to MIPS64R1
In CPU manual Loongson-3 is MIPS64R2 compatible, but during tests we
found that its EI/DI instructions have problems. So we just set the ISA
level to MIPS64R1.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/8320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 7d28f95..6d69332 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -41,10 +41,8 @@ #define cpu_has_mcheck 0 #define cpu_has_mdmx 0 #define cpu_has_mips16 0 -#define cpu_has_mips32r1 0 #define cpu_has_mips32r2 0 #define cpu_has_mips3d 0 -#define cpu_has_mips64r1 0 #define cpu_has_mips64r2 0 #define cpu_has_mipsmt 0 #define cpu_has_prefetch 0 |