diff options
| author | Huacai Chen <chenhc@lemote.com> | 2014-06-26 03:41:31 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 19:47:17 (GMT) |
| commit | ef2f826c8f2ff1e4215968042139604633581a13 (patch) | |
| tree | 2e2cb70e0a16ade5ea70b0ef00ff67ff902d25d8 /arch/mips/include | |
| parent | e7841be50fe2b8751a51a068b8cdcdcb6611e354 (diff) | |
| download | linux-ef2f826c8f2ff1e4215968042139604633581a13.tar.xz | |
MIPS: Loongson-3: Enable the COP2 usage
Loongson-3 has some specific instructions (MMI/SIMD) in coprocessor 2.
COP2 isn't independent because it share COP1 (FPU)'s registers. This
patch enable the COP2 usage so user-space programs can use the MMI/SIMD
instructions. When COP2 exception happens, we enable both COP1 (FPU)
and COP2, only in this way the fp context can be saved and restored
correctly.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7189/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/cop2.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h index c1516cc..d035298 100644 --- a/arch/mips/include/asm/cop2.h +++ b/arch/mips/include/asm/cop2.h @@ -32,6 +32,14 @@ extern void nlm_cop2_restore(struct nlm_cop2_state *); #define cop2_present 1 #define cop2_lazy_restore 0 +#elif defined(CONFIG_CPU_LOONGSON3) + +#define cop2_save(r) +#define cop2_restore(r) + +#define cop2_present 1 +#define cop2_lazy_restore 1 + #else #define cop2_present 0 |