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authorMarkos Chandras <markos.chandras@imgtec.com>2015-07-09 09:40:50 (GMT)
committerRalf Baechle <ralf@linux-mips.org>2015-08-26 13:23:17 (GMT)
commitc982c6d6c48b48159db481581cadbb8773219677 (patch)
tree78fdd17d2a30c16fb6a09cf709f01d22e2104c90 /arch/mips/kernel/cpu-probe.c
parent6f50c83529ac1fa3444ff4be5f5b0bf3d76db678 (diff)
downloadlinux-c982c6d6c48b48159db481581cadbb8773219677.tar.xz
MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB
We are so early in the boot process where we really don't want to stall and wait for CP0 FTLB related changes become visible so just drop the cp0 hazard barrier. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10649/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 02b7512..dc057f3 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -385,7 +385,6 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
else
/* Disable FTLB */
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
- back_to_back_c0_hazard();
break;
}
}