diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-02-13 11:26:41 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 22:09:09 (GMT) |
| commit | bbd426f542cb61f2322e15dab4507f2661090c06 (patch) | |
| tree | 66cc94a921b0342a4a412646d549562a578fc257 /arch/mips/kernel/ptrace32.c | |
| parent | 490b004febb3fe9aca7330a729b29fe935be3b31 (diff) | |
| download | linux-bbd426f542cb61f2322e15dab4507f2661090c06.tar.xz | |
MIPS: Simplify FP context access
This patch replaces the fpureg_t typedef with a "union fpureg" enabling
easier access to 32 & 64 bit values. This allows the access macros used
in cp1emu.c to be simplified somewhat. It will also make it easier to
expand the width of the FP registers as will be done in a future
patch in order to support the 128 bit registers introduced with MSA.
No behavioural change is intended by this patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6532/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/ptrace32.c')
| -rw-r--r-- | arch/mips/kernel/ptrace32.c | 25 |
1 files changed, 8 insertions, 17 deletions
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index b8aa2dd..c394d8f 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -80,7 +80,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, /* Read the word at location addr in the USER area. */ case PTRACE_PEEKUSR: { struct pt_regs *regs; - fpureg_t *fregs; + union fpureg *fregs; unsigned int tmp; regs = task_pt_regs(child); @@ -103,13 +103,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, * order bits of the values stored in the even * registers - unless we're using r2k_switch.S. */ - if (addr & 1) - tmp = fregs[(addr & ~1) - 32] >> 32; - else - tmp = fregs[addr - 32]; + tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], + addr & 1); break; } - tmp = fregs[addr - FPR_BASE]; + tmp = get_fpr32(&fregs[addr - FPR_BASE], 0); break; case PC: tmp = regs->cp0_epc; @@ -233,7 +231,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, regs->regs[addr] = data; break; case FPR_BASE ... FPR_BASE + 31: { - fpureg_t *fregs = get_fpu_regs(child); + union fpureg *fregs = get_fpu_regs(child); if (!tsk_used_math(child)) { /* FP not yet used */ @@ -247,18 +245,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, * order bits of the values stored in the even * registers - unless we're using r2k_switch.S. */ - if (addr & 1) { - fregs[(addr & ~1) - FPR_BASE] &= - 0xffffffff; - fregs[(addr & ~1) - FPR_BASE] |= - ((u64)data) << 32; - } else { - fregs[addr - FPR_BASE] &= ~0xffffffffLL; - fregs[addr - FPR_BASE] |= data; - } + set_fpr32(&fregs[(addr & ~1) - FPR_BASE], + addr & 1, data); break; } - fregs[addr - FPR_BASE] = data; + set_fpr64(&fregs[addr - FPR_BASE], 0, data); break; } case PC: |