diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2005-08-17 13:44:26 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 18:32:09 (GMT) |
| commit | d03d0a57754cb820d318d2234c60b728eb38a94d (patch) | |
| tree | c9feac8689e0081304382411592f3e074fe96502 /arch/mips/kernel/traps.c | |
| parent | 533330bf7fa19854f3b4accd2b84ff58e3ee160f (diff) | |
| download | linux-d03d0a57754cb820d318d2234c60b728eb38a94d.tar.xz | |
MT bulletproofing.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 519b8f1..876aff7 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1186,8 +1186,14 @@ void __init per_cpu_trap_init(void) /* Setting vector spacing enables EI/VI mode */ change_c0_intctl (0x3e0, VECTORSPACING); } - if (cpu_has_divec) - set_c0_cause(CAUSEF_IV); + if (cpu_has_divec) { + if (cpu_has_mipsmt) { + unsigned int vpflags = dvpe(); + set_c0_cause(CAUSEF_IV); + evpe(vpflags); + } else + set_c0_cause(CAUSEF_IV); + } cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; TLBMISS_HANDLER_SETUP(); |