diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2008-03-08 09:56:28 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-03-12 14:14:41 (GMT) |
commit | 234fcd1484a66158b561b36b421547f0ab85fee9 (patch) | |
tree | b63fbb134fd673e1713f0462e6e0642b418da616 /arch/mips/kernel | |
parent | 1af0eea21431bed5d07dffc0fefab57fd72f7e90 (diff) | |
download | linux-234fcd1484a66158b561b36b421547f0ab85fee9.tar.xz |
[MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/cpu-bugs64.c | 4 | ||||
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 10 | ||||
-rw-r--r-- | arch/mips/kernel/head.S | 2 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 7 |
4 files changed, 12 insertions, 11 deletions
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index 417bb3e..a1b48af 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -167,7 +167,7 @@ static inline void check_mult_sh(void) panic(bug64hit, !R4000_WAR ? r4kwar : nowar); } -static volatile int daddi_ov __initdata = 0; +static volatile int daddi_ov __cpuinitdata = 0; asmlinkage void __init do_daddi_ov(struct pt_regs *regs) { @@ -239,7 +239,7 @@ static inline void check_daddi(void) panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); } -int daddiu_bug __initdata = -1; +int daddiu_bug __cpuinitdata = -1; static inline void check_daddiu(void) { diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5861a43..89c3304 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -550,7 +550,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) } } -static char unknown_isa[] __initdata = KERN_ERR \ +static char unknown_isa[] __cpuinitdata = KERN_ERR \ "Unsupported ISA type, c0.config0: %d."; static inline unsigned int decode_config0(struct cpuinfo_mips *c) @@ -656,7 +656,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) return config3 & MIPS_CONF_M; } -static void __init decode_configs(struct cpuinfo_mips *c) +static void __cpuinit decode_configs(struct cpuinfo_mips *c) { /* MIPS32 or MIPS64 compliant CPU. */ c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | @@ -814,7 +814,7 @@ const char *__cpu_name[NR_CPUS]; /* * Name a CPU */ -static __init const char *cpu_to_name(struct cpuinfo_mips *c) +static __cpuinit const char *cpu_to_name(struct cpuinfo_mips *c) { const char *name = NULL; @@ -896,7 +896,7 @@ static __init const char *cpu_to_name(struct cpuinfo_mips *c) return name; } -__init void cpu_probe(void) +__cpuinit void cpu_probe(void) { struct cpuinfo_mips *c = ¤t_cpu_data; unsigned int cpu = smp_processor_id(); @@ -959,7 +959,7 @@ __init void cpu_probe(void) c->srsets = 1; } -__init void cpu_report(void) +__cpuinit void cpu_report(void) { struct cpuinfo_mips *c = ¤t_cpu_data; diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index a24fb79..3613645 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -195,7 +195,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point j start_kernel END(kernel_entry) - __INIT + __CPUINIT #ifdef CONFIG_SMP /* diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 79cf7e9..984c0d0 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1306,7 +1306,7 @@ int cp0_compare_irq; int cp0_perfcount_irq; EXPORT_SYMBOL_GPL(cp0_perfcount_irq); -void __init per_cpu_trap_init(void) +void __cpuinit per_cpu_trap_init(void) { unsigned int cpu = smp_processor_id(); unsigned int status_set = ST0_CU0; @@ -1423,11 +1423,12 @@ void __init set_handler(unsigned long offset, void *addr, unsigned long size) flush_icache_range(ebase + offset, ebase + offset + size); } -static char panic_null_cerr[] __initdata = +static char panic_null_cerr[] __cpuinitdata = "Trying to set NULL cache error exception handler"; /* Install uncached CPU exception handler */ -void __init set_uncached_handler(unsigned long offset, void *addr, unsigned long size) +void __cpuinit set_uncached_handler(unsigned long offset, void *addr, + unsigned long size) { #ifdef CONFIG_32BIT unsigned long uncached_ebase = KSEG1ADDR(ebase); |