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authorJohn Crispin <blogic@openwrt.org>2013-01-19 08:54:24 (GMT)
committerJohn Crispin <blogic@openwrt.org>2013-02-16 23:15:17 (GMT)
commit740c606e8e79c3e3800afbc32b4e6123da403d6c (patch)
treed8fad6b56dcdcdfba522011bab2e114d221ba6a3 /arch/mips/lantiq/falcon
parent3d18c17e4f1699c3a4f47d2483c5d4c3ab3a242b (diff)
downloadlinux-740c606e8e79c3e3800afbc32b4e6123da403d6c.tar.xz
MIPS: lantiq: adds static clock for PP32
The Lantiq DSL SoCs have an internal networking processor. Add code to read the static clock rate. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4815/
Diffstat (limited to 'arch/mips/lantiq/falcon')
-rw-r--r--arch/mips/lantiq/falcon/sysctrl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c
index 2d4ced3..ff4894a 100644
--- a/arch/mips/lantiq/falcon/sysctrl.c
+++ b/arch/mips/lantiq/falcon/sysctrl.c
@@ -241,9 +241,9 @@ void __init ltq_soc_init(void)
/* get our 3 static rates for cpu, fpi and io clocks */
if (ltq_sys1_r32(SYS1_CPU0CC) & CPU0CC_CPUDIV)
- clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M);
+ clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M, 0);
else
- clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M);
+ clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M, 0);
/* add our clock domains */
clkdev_add_sys("1d810000.gpio", SYSCTL_SYSETH, ACTS_P0);