diff options
| author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-10-16 06:17:19 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 01:57:06 (GMT) |
| commit | e2fee5723bbda4a05c86f16a9d0f889a2c4ecede (patch) | |
| tree | 7b6dade7ec51bc9d8ffe83c09070686bb3a278b1 /arch/mips/loongson/common/irq.c | |
| parent | e8be5283881cb96bafb751e1f9ea34c4e6fc2845 (diff) | |
| download | linux-e2fee5723bbda4a05c86f16a9d0f889a2c4ecede.tar.xz | |
MIPS: Bonito64: Make Loongson independent from Bonito64 code.
The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not
identical with it. To avoid influencing the original bonito64 support and
make the loongson support more maintainable, it's better to separate the
Bonito64 code from the Loongson code.
This also prepares the kernel for the coming Loongson 2f machines family
support.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com,
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/common/irq.c')
| -rw-r--r-- | arch/mips/loongson/common/irq.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c index b32b4a3..20e7328 100644 --- a/arch/mips/loongson/common/irq.c +++ b/arch/mips/loongson/common/irq.c @@ -20,21 +20,21 @@ void bonito_irqdispatch(void) int i; /* workaround the IO dma problem: let cpu looping to allow DMA finish */ - int_status = BONITO_INTISR; + int_status = LOONGSON_INTISR; if (int_status & (1 << 10)) { while (int_status & (1 << 10)) { udelay(1); - int_status = BONITO_INTISR; + int_status = LOONGSON_INTISR; } } /* Get pending sources, masked by current enables */ - int_status = BONITO_INTISR & BONITO_INTEN; + int_status = LOONGSON_INTISR & LOONGSON_INTEN; if (int_status != 0) { i = __ffs(int_status); int_status &= ~(1 << i); - do_IRQ(BONITO_IRQ_BASE + i); + do_IRQ(LOONGSON_IRQ_BASE + i); } } @@ -60,13 +60,13 @@ void __init arch_init_irq(void) set_irq_trigger_mode(); /* no steer */ - BONITO_INTSTEER = 0; + LOONGSON_INTSTEER = 0; /* * Mask out all interrupt by writing "1" to all bit position in * the interrupt reset reg. */ - BONITO_INTENCLR = ~0; + LOONGSON_INTENCLR = ~0; /* machine specific irq init */ mach_init_irq(); |