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| author | David Daney <ddaney@caviumnetworks.com> | 2009-12-04 21:52:36 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 11:53:03 (GMT) |
| commit | 325f8a0a31df567dbafafc48f8e60f3c1f101a46 (patch) | |
| tree | b36383f4d483ecc6d057cdd41ef50b6403e89b9c /arch/mips/mm/tlbex.c | |
| parent | ef6c1fd662d18c0e2ed92825c8837e94b5ec3a1f (diff) | |
| download | linux-325f8a0a31df567dbafafc48f8e60f3c1f101a46.tar.xz | |
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index badcf5e..eae45f0 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -549,11 +549,13 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, uasm_i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3); uasm_i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */ +#ifndef __PAGETABLE_PMD_FOLDED uasm_i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */ uasm_i_ld(p, ptr, 0, ptr); /* get pmd pointer */ uasm_i_dsrl(p, tmp, tmp, PMD_SHIFT-3); /* get pmd offset in bytes */ uasm_i_andi(p, tmp, tmp, (PTRS_PER_PMD - 1)<<3); uasm_i_daddu(p, ptr, ptr, tmp); /* add in pmd offset */ +#endif } /* |