diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2016-02-03 16:17:29 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 12:01:53 (GMT) |
| commit | 1dbf6a81c845a748e46b4bcaf25d958038624ad8 (patch) | |
| tree | a917546c842760c489b45bf620cbc68d90e2abbf /arch/mips/mm | |
| parent | df8b1a5ee9f7f5fbb5e8f0df9537c648481019ea (diff) | |
| download | linux-1dbf6a81c845a748e46b4bcaf25d958038624ad8.tar.xz | |
MIPS: Add M6250 cases to CPU switch statements
Add casses supporting the M6250 CPU to various switch statements in the
core MIPS kernel code that define behaviour dependent upon the CPU.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12374/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 729a7d4..e64d595 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1286,6 +1286,7 @@ static void probe_pcache(void) case CPU_QEMU_GENERIC: case CPU_I6400: case CPU_P6600: + case CPU_M6250: if (!(read_c0_config7() & MIPS_CONF7_IAR) && (c->icache.waysize > PAGE_SIZE)) c->icache.flags |= MIPS_CACHE_ALIASES; |