diff options
| author | Jaidev Patwardhan <jaidev@mips.com> | 2009-07-10 08:54:25 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-11-02 11:00:06 (GMT) |
| commit | 05cf20790b3b3ed81cb001e8f41e473247f28302 (patch) | |
| tree | e173ac9127807a41929fd493c955018bc0e1d64f /arch/mips/mti-malta | |
| parent | 7098f748283b4c056cca9c284c476b03f004ca12 (diff) | |
| download | linux-05cf20790b3b3ed81cb001e8f41e473247f28302.tar.xz | |
MIPS: GCMP: Avoid accessing registers when they are not present
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta')
| -rw-r--r-- | arch/mips/mti-malta/malta-int.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 377a925..4c3fca1 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -411,6 +411,11 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { */ int __init gcmp_probe(unsigned long addr, unsigned long size) { + if (mips_revision_sconid != MIPS_REVISION_SCON_ROCIT) { + gcmp_present = 0; + return gcmp_present; + } + if (gcmp_present >= 0) return gcmp_present; @@ -479,9 +484,14 @@ void __init arch_init_irq(void) GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK; gic_present = 1; } else { - _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ); - gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) & - MSC01_SC_CFG_GICPRES_MSK) >> MSC01_SC_CFG_GICPRES_SHF; + if (mips_revision_sconid == MIPS_REVISION_SCON_ROCIT) { + _msc01_biu_base = (unsigned long) + ioremap_nocache(MSC01_BIU_REG_BASE, + MSC01_BIU_ADDRSPACE_SZ); + gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) & + MSC01_SC_CFG_GICPRES_MSK) >> + MSC01_SC_CFG_GICPRES_SHF; + } } if (gic_present) pr_debug("GIC present\n"); |