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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2008-04-17 20:07:42 (GMT)
committerRalf Baechle <ralf@linux-mips.org>2008-06-05 17:13:15 (GMT)
commit96173a6c4ebca4c146bb87026cce78bbe392cb61 (patch)
treef4af691b3efca01f01ff1581ffd26b16ddbf48d0 /arch/mips/pci/pci-ip27.c
parentb32bb803fb52cc669762780d44b4c3d9e3d799f6 (diff)
downloadlinux-96173a6c4ebca4c146bb87026cce78bbe392cb61.tar.xz
[MIPS] IP27: misc fixes
- fix PCI interrupt assignment by emulating ioc3 interrupt pin register - use pci_probe_only mode - select correct page size in bridge - remove no longer needed ioc3_sio_init() code [Ralf: Fix for 64kB or larger pagesizes] Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-ip27.c')
-rw-r--r--arch/mips/pci/pci-ip27.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index bb64828..a185169 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -47,6 +47,9 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
static int num_bridges = 0;
bridge_t *bridge;
int slot;
+ extern int pci_probe_only;
+
+ pci_probe_only = 1;
printk("a bridge\n");
@@ -100,6 +103,11 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
*/
bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP |
BRIDGE_CTRL_MEM_SWAP;
+#ifdef CONFIG_PAGE_SIZE_4KB
+ bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE;
+#else /* 16kB or larger */
+ bridge->b_wid_control |= BRIDGE_CTRL_PAGE_SIZE;
+#endif
/*
* Hmm... IRIX sets additional bits in the address which