diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2013-09-17 15:58:10 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-09-18 18:25:19 (GMT) |
| commit | 8ff374b9c296b96484d5e63b45b22d0862ffee8f (patch) | |
| tree | 0a40c8b881b985854a58793b14ca7b4de9c6f123 /arch/mips/sibyte/bcm1480/setup.c | |
| parent | b42b4f3af8b1ac2f7b09781d523bf918f366d8d6 (diff) | |
| download | linux-8ff374b9c296b96484d5e63b45b22d0862ffee8f.tar.xz | |
MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/bcm1480/setup.c')
| -rw-r--r-- | arch/mips/sibyte/bcm1480/setup.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c index 05ed92c..8e2e04f 100644 --- a/arch/mips/sibyte/bcm1480/setup.c +++ b/arch/mips/sibyte/bcm1480/setup.c @@ -22,6 +22,7 @@ #include <linux/string.h> #include <asm/bootinfo.h> +#include <asm/cpu.h> #include <asm/mipsregs.h> #include <asm/io.h> #include <asm/sibyte/sb1250.h> @@ -119,7 +120,7 @@ void __init bcm1480_setup(void) uint64_t sys_rev; int plldiv; - sb1_pass = read_c0_prid() & 0xff; + sb1_pass = read_c0_prid() & PRID_REV_MASK; sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); soc_type = SYS_SOC_TYPE(sys_rev); part_type = G_SYS_PART(sys_rev); |