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authorJohn Linn <john.linn@xilinx.com>2008-07-02 22:11:28 (GMT)
committerGrant Likely <grant.likely@secretlab.ca>2008-07-04 06:58:59 (GMT)
commitd58577d8f36f66dbb5dec30fc01dfddda0cfd1fa (patch)
tree92840d18b50ccaa63fbc4aec85c962223c5e9982 /arch/powerpc/boot/wrapper
parentdc568ec4906ac2478e2d692adc6b12fbb6e4657e (diff)
downloadlinux-d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa.tar.xz
powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
The following changes add processing to initialize the Xilinx 16550 UART in the boot wrapper for Virtex targets without firmware. Normally the boot wrapper assumes that the serial port has already been initialized by firmware. The wrapper was also modified to add the 440 build. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot/wrapper')
-rwxr-xr-xarch/powerpc/boot/wrapper6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index df2358e..592a6ea 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -207,7 +207,11 @@ adder875-redboot)
binary=y
;;
simpleboot-virtex405-*)
- platformo="$object/virtex405-head.o $object/simpleboot.o"
+ platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
+ binary=y
+ ;;
+simpleboot-virtex440-*)
+ platformo="$object/simpleboot.o $object/virtex.o"
binary=y
;;
asp834x-redboot)