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authorK.Prasad <prasad@linux.vnet.ibm.com>2010-06-15 06:05:31 (GMT)
committerPaul Mackerras <paulus@samba.org>2010-06-22 09:40:50 (GMT)
commit2538c2d08f46141550a1e68819efa8fe31c6e3dc (patch)
treec84255fa8dbc9446d4ff546988adabc12450b880 /arch/powerpc/kernel/signal.c
parent5aae8a53708025d4e718f0d2e7c2f766779ddc71 (diff)
downloadlinux-2538c2d08f46141550a1e68819efa8fe31c6e3dc.tar.xz
powerpc, hw_breakpoint: Handle concurrent alignment interrupts
If an alignment interrupt occurs on an instruction that is being single-stepped, the alignment interrupt handler currently handles the single-step condition by unconditionally sending a SIGTRAP to the process. Other synchronous interrupts that result in the instruction being emulated do likewise. With hw_breakpoint support, the hw_breakpoint code needs to be able to intercept these single-step events as well as those where the instruction executes normally and a trace interrupt happens. Fix this by making emulate_single_step() use the existing single_step_exception() function instead of calling _exception() directly. We then make single_step_exception() use the abstracted clear_single_step() rather than clearing bits in the MSR image directly so that emulate_single_step() will continue to work correctly on Book 3E processors. Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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