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author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2016-04-29 13:26:12 (GMT) |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-05-11 11:53:48 (GMT) |
commit | b5dcc6096971b7c11b443b79ae8b69ccb01ec04e (patch) | |
tree | 3fd41660675e1b2e858bcf503d1d8c730e52b665 /arch/powerpc/mm/hash_utils_64.c | |
parent | 7a0eedeedd5d192f64fd4cd46634e409cb7a513b (diff) | |
download | linux-b5dcc6096971b7c11b443b79ae8b69ccb01ec04e.tar.xz |
powerpc/mm/radix: Update PTCR on secondary CPUs
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/hash_utils_64.c')
-rw-r--r-- | arch/powerpc/mm/hash_utils_64.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index e6b53cd..faaadef 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -896,9 +896,13 @@ void __init hash__early_init_mmu(void) void hash__early_init_mmu_secondary(void) { /* Initialize hash table for that CPU */ - if (!firmware_has_feature(FW_FEATURE_LPAR)) - mtspr(SPRN_SDR1, _SDR1); - + if (!firmware_has_feature(FW_FEATURE_LPAR)) { + if (!cpu_has_feature(CPU_FTR_ARCH_300)) + mtspr(SPRN_SDR1, _SDR1); + else + mtspr(SPRN_PTCR, + __pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); + } /* Initialize SLB */ slb_initialize(); } |