diff options
| author | John Rigby <jrigby@freescale.com> | 2008-06-26 17:07:57 (GMT) |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-07-16 22:57:35 (GMT) |
| commit | 76fe1ffce94067fc82d1d958f826eb9f1df53910 (patch) | |
| tree | c6c6a7bdd6c7d6d2fb7374789868fed40d93fdd7 /arch/powerpc/sysdev/fsl_pci.c | |
| parent | b500563b22ea2a78760b2ccaa328426b0388e2ee (diff) | |
| download | linux-76fe1ffce94067fc82d1d958f826eb9f1df53910.tar.xz | |
powerpc: Move mpc83xx_add_bridge to fsl_pci.c
This allows other platforms with the same pci block like MPC5121 to use it.
Signed-off-by: John Rigby <jrigby@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 87b0aa1..61e6d77 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -27,6 +27,7 @@ #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> +#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) /* atmu setup for fsl pci/pcie controller */ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc) { @@ -248,3 +249,63 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); +#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ + +#if defined(CONFIG_PPC_83xx) +int __init mpc83xx_add_bridge(struct device_node *dev) +{ + int len; + struct pci_controller *hose; + struct resource rsrc; + const int *bus_range; + int primary = 1, has_address = 0; + phys_addr_t immr = get_immrbase(); + + pr_debug("Adding PCI host bridge %s\n", dev->full_name); + + /* Fetch host bridge registers address */ + has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); + + /* Get bus range if any */ + bus_range = of_get_property(dev, "bus-range", &len); + if (bus_range == NULL || len < 2 * sizeof(int)) { + printk(KERN_WARNING "Can't get bus-range for %s, assume" + " bus 0\n", dev->full_name); + } + + ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; + hose = pcibios_alloc_controller(dev); + if (!hose) + return -ENOMEM; + + hose->first_busno = bus_range ? bus_range[0] : 0; + hose->last_busno = bus_range ? bus_range[1] : 0xff; + + /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar + * the other at 0x8600, we consider the 0x8500 the primary controller + */ + /* PCI 1 */ + if ((rsrc.start & 0xfffff) == 0x8500) { + setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0); + } + /* PCI 2 */ + if ((rsrc.start & 0xfffff) == 0x8600) { + setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0); + primary = 0; + } + + printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " + "Firmware bus number: %d->%d\n", + (unsigned long long)rsrc.start, hose->first_busno, + hose->last_busno); + + pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", + hose, hose->cfg_addr, hose->cfg_data); + + /* Interpret the "ranges" property */ + /* This also maps the I/O region and sets isa_io/mem_base */ + pci_process_bridge_OF_ranges(hose, dev, primary); + + return 0; +} +#endif /* CONFIG_PPC_83xx */ |