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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-18 13:31:43 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-18 13:31:43 (GMT) |
| commit | 0a95d92c0054e74fb79607ac2df958b7bf295706 (patch) | |
| tree | e2c5f836e799dcfd72904949be47595af91432e7 /arch/powerpc/sysdev/fsl_pci.h | |
| parent | 08351fc6a75731226e1112fc7254542bd3a2912e (diff) | |
| parent | 831532035b12a5f7b600515a6f4da0b207b82d6e (diff) | |
| download | linux-0a95d92c0054e74fb79607ac2df958b7bf295706.tar.xz | |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (62 commits)
powerpc/85xx: Fix signedness bug in cache-sram
powerpc/fsl: 85xx: document cache sram bindings
powerpc/fsl: define binding for fsl mpic interrupt controllers
powerpc/fsl_msi: Handle msi-available-ranges better
drivers/serial/ucc_uart.c: Add of_node_put to avoid memory leak
powerpc/85xx: Fix SPE float to integer conversion failure
powerpc/85xx: Update sata controller compatible for p1022ds board
ATA: Add FSL sata v2 controller support
powerpc/mpc8xxx_gpio: simplify searching for 'fsl, qoriq-gpio' compatiable
powerpc/8xx: remove obsolete mgsuvd board
powerpc/82xx: rename and update mgcoge board support
powerpc/83xx: rename and update kmeter1
powerpc/85xx: Workaroudn e500 CPU erratum A005
powerpc/fsl_pci: Add support for FSL PCIe controllers v2.x
powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
powerpc/pseries: Disable MSI using new interface if possible
powerpc: Enable GENERIC_HARDIRQS_NO_DEPRECATED.
powerpc: core irq_data conversion.
powerpc: sysdev/xilinx_intc irq_data conversion.
powerpc: sysdev/uic irq_data conversion.
...
Fix up conflicts in arch/powerpc/sysdev/fsl_msi.c (due to getting rid of
of_platform_driver in arch/powerpc)
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.h')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_pci.h | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index 8ad72a1..a39ed5c 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -1,7 +1,7 @@ /* * MPC85xx/86xx PCI Express structure define * - * Copyright 2007 Freescale Semiconductor, Inc + * Copyright 2007,2011 Freescale Semiconductor, Inc * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -21,6 +21,7 @@ #define PIWAR_TGI_LOCAL 0x00f00000 /* target - local memory */ #define PIWAR_READ_SNOOP 0x00050000 #define PIWAR_WRITE_SNOOP 0x00005000 +#define PIWAR_SZ_MASK 0x0000003f /* PCI/PCI Express outbound window reg */ struct pci_outbound_window_regs { @@ -49,7 +50,9 @@ struct ccsr_pci { __be32 int_ack; /* 0x.008 - PCI Interrupt Acknowledge Register */ __be32 pex_otb_cpl_tor; /* 0x.00c - PCIE Outbound completion timeout register */ __be32 pex_conf_tor; /* 0x.010 - PCIE configuration timeout register */ - u8 res2[12]; + __be32 pex_config; /* 0x.014 - PCIE CONFIG Register */ + __be32 pex_int_status; /* 0x.018 - PCIE interrupt status */ + u8 res2[4]; __be32 pex_pme_mes_dr; /* 0x.020 - PCIE PME and message detect register */ __be32 pex_pme_mes_disr; /* 0x.024 - PCIE PME and message disable register */ __be32 pex_pme_mes_ier; /* 0x.028 - PCIE PME and message interrupt enable register */ @@ -62,14 +65,14 @@ struct ccsr_pci { * in all of the other outbound windows. */ struct pci_outbound_window_regs pow[5]; - - u8 res14[256]; - -/* PCI/PCI Express inbound window 3-1 + u8 res14[96]; + struct pci_inbound_window_regs pmit; /* 0xd00 - 0xd9c Inbound MSI */ + u8 res6[96]; +/* PCI/PCI Express inbound window 3-0 * inbound window 1 supports only a 32-bit base address and does not * define an inbound window base extended address register. */ - struct pci_inbound_window_regs piw[3]; + struct pci_inbound_window_regs piw[4]; __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */ u8 res21[4]; |