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authorCaesar Wang <wxt@rock-chips.com>2016-09-05 18:17:14 (GMT)
committerHeiko Stuebner <heiko@sntech.de>2016-09-05 23:02:11 (GMT)
commit210bbd38bb88989ce19208f98e530ff0468f38bd (patch)
tree7ae1fca5c51dfb1337c75567e0b2f56841a9dee3 /arch/powerpc
parent4a3a3d32c77f942a10c0319f589186a768821397 (diff)
downloadlinux-210bbd38bb88989ce19208f98e530ff0468f38bd.tar.xz
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
Add the interrupts cells value for 4, and the 4th cell is zero. Due to the doc[0] said:" the system requires describing PPI affinity, then the value must be at least 4" The 4th cell is a phandle to a node describing a set of CPUs this interrupt is affine to. The interrupt must be a PPI, and the node pointed must be a subnode of the "ppi-partitions" subnode. For interrupt types other than PPI or PPIs that are not partitionned, this cell must be zero. See the "ppi-partitions" node description below. [0]: Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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