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authorYoshinori Sato <ysato@users.sourceforge.jp>2006-12-07 09:07:27 (GMT)
committerPaul Mundt <lethal@linux-sh.org>2006-12-11 23:42:07 (GMT)
commit11cbb70ea326e8ec78b2beb2b0c85c9ec71c279b (patch)
treec165c1228ef1c921663c0b8d347480c8e94e25be /arch/sh/Kconfig
parent780a1568886a2f5df9bf11b72ba0624c80db5b3b (diff)
downloadlinux-11cbb70ea326e8ec78b2beb2b0c85c9ec71c279b.tar.xz
sh: Trivial build fixes for SH-2 support.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/Kconfig')
-rw-r--r--arch/sh/Kconfig14
1 files changed, 1 insertions, 13 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8e24c40..3aa3b88 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -479,7 +479,7 @@ config SH_CLK_MD
int "CPU Mode Pin Setting"
depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
help
- MD2 - MD0 Setting.
+ MD2 - MD0 pin setting.
menu "CPU Frequency scaling"
@@ -580,18 +580,6 @@ config NR_CPUS
source "kernel/Kconfig.preempt"
-config CPU_HAS_SR_RB
- bool "CPU has SR.RB"
- depends on CPU_SH3 || CPU_SH4
- default y
- help
- This will enable the use of SR.RB register bank usage. Processors
- that are lacking this bit must have another method in place for
- accomplishing what is taken care of by the banked registers.
-
- See <file:Documentation/sh/register-banks.txt> for further
- information on SR.RB and register banking in the kernel in general.
-
config NODES_SHIFT
int
default "1"