sh: Kill off dead bigsur and ec3104 boards.

Neither of these have had any maintenance in years, and there's
no interest in keeping them straggling along. These have already
been slated for removal some time, so finally just get rid of them.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

3 files changed, 0 insertions, 93 deletions

diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 9e00cb8..cc8d0d0 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780)	+= pci-sh7780.o ops-sh4.o
 obj-$(CONFIG_SH_DREAMCAST)		+= ops-dreamcast.o fixups-dreamcast.o \
 					   dma-dreamcast.o
 obj-$(CONFIG_SH_SECUREEDGE5410)		+= ops-snapgear.o
-obj-$(CONFIG_SH_BIGSUR)			+= ops-bigsur.o
 obj-$(CONFIG_SH_RTS7751R2D)		+= ops-rts7751r2d.o fixups-rts7751r2d.o
 obj-$(CONFIG_SH_SH03)			+= ops-sh03.o fixups-sh03.o
 obj-$(CONFIG_SH_R7780RP)		+= ops-r7780rp.o fixups-r7780rp.o
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
deleted file mode 100644
index eb31be7..0000000
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-bigsur.c
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- *
- * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the Hitachi Big Sur Evaluation Board
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-#include "pci-sh4.h"
-#include <asm/bigsur/bigsur.h>
-
-#define BIGSUR_PCI_IO	0x4000
-#define BIGSUR_PCI_MEM	0xfd000000
-
-static struct resource sh7751_io_resource = {
-	.name		= "SH7751 IO",
-	.start		= BIGSUR_PCI_IO,
-	.end		= BIGSUR_PCI_IO + (64*1024) - 1,
-	.flags		= IORESOURCE_IO,
-};
-
-static struct resource sh7751_mem_resource = {
-	.name		= "SH7751 mem",
-	.start		= BIGSUR_PCI_MEM,
-	.end		= BIGSUR_PCI_MEM + (64*1024*1024) - 1,
-	.flags		= IORESOURCE_MEM,
-};
-
-extern struct pci_ops sh7751_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-	{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-	{ 0, }
-};
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-	.window0	= {
-		.base	= SH7751_CS3_BASE_ADDR,
-		.size	= BIGSUR_LSR0_SIZE,
-	},
-
-	.window1	= {
-		.base	= SH7751_CS3_BASE_ADDR,
-		.size	= BIGSUR_LSR1_SIZE,
-	},
-};
-
-/*
- * Initialize the Big Sur PCI interface
- * Setup hardware to be Central Funtion
- * Copy the BSR regs to the PCI interface
- * Setup PCI windows into local RAM
- */
-int __init pcibios_init_platform(void)
-{
-	return sh7751_pcic_init(&sh7751_pci_map);
-}
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-	/*
-	 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
-	 * interface is on the wrong end of the board so that it can also
-	 * support a V320 CPI interface chip...  Therefor the IRQ mapping is
-	 * somewhat use dependent... I'l assume a linear map for now, i.e.
-	 * INTA=slot0,pin0... INTD=slot3,pin0...
-	 */
-	int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
-
-	PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
-	       slot, pin-1+'A', irq);
-
-	return irq;
-}
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 85e1ee2..9ddff76 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -157,15 +157,6 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
 		 PCIBIOS_MIN_IO, (64 << 10),
 		 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
 
-	/*
-	 * XXX: For now, leave this board-specific. In the event we have other
-	 * boards that need to do similar work, this can be wrapped.
-	 */
-#ifdef CONFIG_SH_BIGSUR
-	bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
-			SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
-#endif
-
 	/* Make sure the MSB's of IO window are set to access PCI space
 	 * correctly */
 	word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;