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author | Ingo Molnar <mingo@elte.hu> | 2010-04-15 07:35:24 (GMT) |
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committer | Ingo Molnar <mingo@elte.hu> | 2010-04-15 07:36:16 (GMT) |
commit | b257c14ceb1194a6181144210056d38f22127189 (patch) | |
tree | c803925f1d5bf2237e7495d306bf43929df0c952 /arch/sh/mm/tlb-sh3.c | |
parent | 371fd7e7a56a5c136d31aa980011bd2f131c3ef5 (diff) | |
parent | 2ba3abd8186f24c7fb418927025b4e2120e3a362 (diff) | |
download | linux-b257c14ceb1194a6181144210056d38f22127189.tar.xz |
Merge branch 'linus' into sched/core
Merge reason: merge the latest fixes, update to -rc4.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/mm/tlb-sh3.c')
-rw-r--r-- | arch/sh/mm/tlb-sh3.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 4f5f7cb..7a940db 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c @@ -77,3 +77,22 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) for (i = 0; i < ways; i++) __raw_writel(data, addr + (i << 8)); } + +void local_flush_tlb_all(void) +{ + unsigned long flags, status; + + /* + * Flush all the TLB. + * + * Write to the MMU control register's bit: + * TF-bit for SH-3, TI-bit for SH-4. + * It's same position, bit #2. + */ + local_irq_save(flags); + status = __raw_readl(MMUCR); + status |= 0x04; + __raw_writel(status, MMUCR); + ctrl_barrier(); + local_irq_restore(flags); +} |