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author | Stuart Menefy <stuart.menefy@st.com> | 2009-08-24 08:36:24 (GMT) |
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committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-24 08:36:24 (GMT) |
commit | a5cf9e2444ec15de5407696ff21c32dd21ca0a8d (patch) | |
tree | 6835770b0361cffc204d0491156a76408f03719b /arch/sh | |
parent | 5e9377ec6f84e5334e9347e84e77d34e9a089ca7 (diff) | |
download | linux-a5cf9e2444ec15de5407696ff21c32dd21ca0a8d.tar.xz |
sh: Improve comments int SH4 cache flushing code
This is a pure documentation, to try to explain why the cache flushing code
for the SH4 is implemented the way it is.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/mm/cache-sh4.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 5cfe08d..7ce8161 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -581,6 +581,17 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys, * Break the 1, 2 and 4 way variants of this out into separate functions to * avoid nearly all the overhead of having the conditional stuff in the function * bodies (+ the 1 and 2 way cases avoid saving any registers too). + * + * We want to eliminate unnecessary bus transactions, so this code uses + * a non-obvious technique. + * + * Loop over a cache way sized block of, one cache line at a time. For each + * line, use movca.a to cause the current cache line contents to be written + * back, but without reading anything from main memory. However this has the + * side effect that the cache is now caching that memory location. So follow + * this with a cache invalidate to mark the cache line invalid. And do all + * this with interrupts disabled, to avoid the cache line being accidently + * evicted while it is holding garbage. */ static void __flush_dcache_segment_1way(unsigned long start, unsigned long extent_per_way) |