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authorKhalid Aziz <khalid.aziz@oracle.com>2015-05-27 16:00:46 (GMT)
committerDavid S. Miller <davem@davemloft.net>2015-06-01 05:15:01 (GMT)
commit494e5b6faeda1d1e830a13e10b3c7bc323f35d97 (patch)
tree612e28b6b6678d133d960b9241401aa0e8ddc98d /arch/sparc/kernel/vmlinux.lds.S
parentf0c1a1173773a56d500f1814893e63f97580f76a (diff)
downloadlinux-494e5b6faeda1d1e830a13e10b3c7bc323f35d97.tar.xz
sparc: Resolve conflict between sparc v9 and M7 on usage of bit 9 of TTE
sparc: Resolve conflict between sparc v9 and M7 on usage of bit 9 of TTE Bit 9 of TTE is CV (Cacheable in V-cache) on sparc v9 processor while the same bit 9 is MCDE (Memory Corruption Detection Enable) on M7 processor. This creates a conflicting usage of the same bit. Kernel sets TTE.cv bit on all pages for sun4v architecture which works well for sparc v9 but enables memory corruption detection on M7 processor which is not the intent. This patch adds code to determine if kernel is running on M7 processor and takes steps to not enable memory corruption detection in TTE erroneously. Signed-off-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/vmlinux.lds.S')
-rw-r--r--arch/sparc/kernel/vmlinux.lds.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 0924305..f1a2f68 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -138,6 +138,11 @@ SECTIONS
*(.pause_3insn_patch)
__pause_3insn_patch_end = .;
}
+ .sun_m7_2insn_patch : {
+ __sun_m7_2insn_patch = .;
+ *(.sun_m7_2insn_patch)
+ __sun_m7_2insn_patch_end = .;
+ }
PERCPU_SECTION(SMP_CACHE_BYTES)
. = ALIGN(PAGE_SIZE);