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author | Chris Metcalf <cmetcalf@tilera.com> | 2010-11-01 21:00:37 (GMT) |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-11-24 18:11:18 (GMT) |
commit | e5a06939736277c54a68ae275433db55b99d187c (patch) | |
tree | 94a38715a5af3d269574dd4369e37a0f6f859957 /arch/tile/include/asm/processor.h | |
parent | 239b0b441449b2c70492880e6c6a4a885afa74ba (diff) | |
download | linux-e5a06939736277c54a68ae275433db55b99d187c.tar.xz |
drivers/net/tile/: on-chip network drivers for the tile architecture
This change adds the first network driver for the tile architecture,
supporting the on-chip XGBE and GBE shims.
The infrastructure is present for the TILE-Gx networking drivers (another
three source files in the new directory) but for now the the actual
tilegx sources are waiting on releasing hardware to initial customers.
Note that arch/tile/include/hv/* are "upstream" headers from the
Tilera hypervisor and will probably benefit less from LKML review.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/processor.h')
-rw-r--r-- | arch/tile/include/asm/processor.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h index 1747ff3..a9e7c87 100644 --- a/arch/tile/include/asm/processor.h +++ b/arch/tile/include/asm/processor.h @@ -292,8 +292,18 @@ extern int kstack_hash; /* Are we using huge pages in the TLB for kernel data? */ extern int kdata_huge; +/* Support standard Linux prefetching. */ +#define ARCH_HAS_PREFETCH +#define prefetch(x) __builtin_prefetch(x) #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() +/* Bring a value into the L1D, faulting the TLB if necessary. */ +#ifdef __tilegx__ +#define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x)) +#else +#define prefetch_L1(x) __insn_prefetch_L1((void *)(x)) +#endif + #else /* __ASSEMBLY__ */ /* Do some slow action (e.g. read a slow SPR). */ |